This revision was automatically updated to reflect the committed changes.
Closed by commit rG661e4040ac60: [LLDB] Fix SVE reginfo for sequential offset
in g packet (authored by omjavaid).
Herald added a project: LLDB.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90741/new/
https://reviews.llvm.org/D90741
Files:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
Index: lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
+++ lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
@@ -89,7 +89,7 @@
const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
sve_reg_offset = sve::ptrace_fpsimd_offset + (reg - GetRegNumSVEZ0()) * 16;
} else if (m_sve_state == SVEState::Full) {
- uint32_t sve_z0_offset = GetGPRSize() + 8;
+ uint32_t sve_z0_offset = GetGPRSize() + 16;
sve_reg_offset =
sve::SigRegsOffset() + reg_info->byte_offset - sve_z0_offset;
}
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -288,8 +288,10 @@
uint32_t offset = SVE_REGS_DEFAULT_OFFSET_LINUX;
- reg_info_ref[sve_vg].byte_offset = offset;
- offset += reg_info_ref[sve_vg].byte_size;
+ reg_info_ref[fpu_fpsr].byte_offset = offset;
+ reg_info_ref[fpu_fpcr].byte_offset = offset + 4;
+ reg_info_ref[sve_vg].byte_offset = offset + 8;
+ offset += 16;
// Update Z registers size and offset
uint32_t s_reg_base = fpu_s0;
@@ -314,8 +316,7 @@
offset += reg_info_ref[it].byte_size;
}
- reg_info_ref[fpu_fpsr].byte_offset = offset;
- reg_info_ref[fpu_fpcr].byte_offset = offset + 4;
+ m_per_vq_reg_infos[sve_vq] = reg_info_ref;
}
m_register_info_p = reg_info_ref.data();
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -1111,7 +1111,7 @@
sve_reg_offset =
SVE_PT_FPSIMD_OFFSET + (reg - GetRegisterInfo().GetRegNumSVEZ0()) * 16;
} else if (m_sve_state == SVEState::Full) {
- uint32_t sve_z0_offset = GetGPRSize() + 8;
+ uint32_t sve_z0_offset = GetGPRSize() + 16;
sve_reg_offset =
SVE_SIG_REGS_OFFSET + reg_info->byte_offset - sve_z0_offset;
}
Index: lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
+++ lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
@@ -89,7 +89,7 @@
const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
sve_reg_offset = sve::ptrace_fpsimd_offset + (reg - GetRegNumSVEZ0()) * 16;
} else if (m_sve_state == SVEState::Full) {
- uint32_t sve_z0_offset = GetGPRSize() + 8;
+ uint32_t sve_z0_offset = GetGPRSize() + 16;
sve_reg_offset =
sve::SigRegsOffset() + reg_info->byte_offset - sve_z0_offset;
}
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -288,8 +288,10 @@
uint32_t offset = SVE_REGS_DEFAULT_OFFSET_LINUX;
- reg_info_ref[sve_vg].byte_offset = offset;
- offset += reg_info_ref[sve_vg].byte_size;
+ reg_info_ref[fpu_fpsr].byte_offset = offset;
+ reg_info_ref[fpu_fpcr].byte_offset = offset + 4;
+ reg_info_ref[sve_vg].byte_offset = offset + 8;
+ offset += 16;
// Update Z registers size and offset
uint32_t s_reg_base = fpu_s0;
@@ -314,8 +316,7 @@
offset += reg_info_ref[it].byte_size;
}
- reg_info_ref[fpu_fpsr].byte_offset = offset;
- reg_info_ref[fpu_fpcr].byte_offset = offset + 4;
+ m_per_vq_reg_infos[sve_vq] = reg_info_ref;
}
m_register_info_p = reg_info_ref.data();
Index: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
===================================================================
--- lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -1111,7 +1111,7 @@
sve_reg_offset =
SVE_PT_FPSIMD_OFFSET + (reg - GetRegisterInfo().GetRegNumSVEZ0()) * 16;
} else if (m_sve_state == SVEState::Full) {
- uint32_t sve_z0_offset = GetGPRSize() + 8;
+ uint32_t sve_z0_offset = GetGPRSize() + 16;
sve_reg_offset =
SVE_SIG_REGS_OFFSET + reg_info->byte_offset - sve_z0_offset;
}
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