Author: Muhammad Omair Javaid Date: 2020-11-17T17:18:34+05:00 New Revision: 661e4040ac60b3df06b2495ea916302b35d9bac2
URL: https://github.com/llvm/llvm-project/commit/661e4040ac60b3df06b2495ea916302b35d9bac2 DIFF: https://github.com/llvm/llvm-project/commit/661e4040ac60b3df06b2495ea916302b35d9bac2.diff LOG: [LLDB] Fix SVE reginfo for sequential offset in g packet This moves in the direction of our effort to synchronize register descriptions between LLDB and GDB xml description. We want to able to send registers in a way that their offset fields can be re-constructed based on register sizes in the increasing order of register number. In context to Arm64 SVE, FPCR and FPSR are same registers in FPU regset and SVE regset. Previously FPSR/FPCR offset was set at the end of SVE data because Linux ptrace data placed FPCR and FPSR at the end of SVE register set. Considering interoperability with other stubs like QEMU and that g packets should generate register data in increasing order of register numbers. We have to move FPCR/FPSR offset up to its original location according to register numbering scheme of ARM64 registers with SVE registers included. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D90741 Added: Modified: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp Removed: ################################################################################ diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 810bc8479742f..1fa87e13a0aac 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -1111,7 +1111,7 @@ uint32_t NativeRegisterContextLinux_arm64::CalculateSVEOffset( sve_reg_offset = SVE_PT_FPSIMD_OFFSET + (reg - GetRegisterInfo().GetRegNumSVEZ0()) * 16; } else if (m_sve_state == SVEState::Full) { - uint32_t sve_z0_offset = GetGPRSize() + 8; + uint32_t sve_z0_offset = GetGPRSize() + 16; sve_reg_offset = SVE_SIG_REGS_OFFSET + reg_info->byte_offset - sve_z0_offset; } diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp index 2e8335f23b65b..701c88c312586 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp +++ b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp @@ -288,8 +288,10 @@ RegisterInfoPOSIX_arm64::ConfigureVectorRegisterInfos(uint32_t sve_vq) { uint32_t offset = SVE_REGS_DEFAULT_OFFSET_LINUX; - reg_info_ref[sve_vg].byte_offset = offset; - offset += reg_info_ref[sve_vg].byte_size; + reg_info_ref[fpu_fpsr].byte_offset = offset; + reg_info_ref[fpu_fpcr].byte_offset = offset + 4; + reg_info_ref[sve_vg].byte_offset = offset + 8; + offset += 16; // Update Z registers size and offset uint32_t s_reg_base = fpu_s0; @@ -314,8 +316,7 @@ RegisterInfoPOSIX_arm64::ConfigureVectorRegisterInfos(uint32_t sve_vq) { offset += reg_info_ref[it].byte_size; } - reg_info_ref[fpu_fpsr].byte_offset = offset; - reg_info_ref[fpu_fpcr].byte_offset = offset + 4; + m_per_vq_reg_infos[sve_vq] = reg_info_ref; } m_register_info_p = reg_info_ref.data(); diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp index c19fe88aa6639..129a887a550cf 100644 --- a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp +++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp @@ -89,7 +89,7 @@ uint32_t RegisterContextCorePOSIX_arm64::CalculateSVEOffset( const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; sve_reg_offset = sve::ptrace_fpsimd_offset + (reg - GetRegNumSVEZ0()) * 16; } else if (m_sve_state == SVEState::Full) { - uint32_t sve_z0_offset = GetGPRSize() + 8; + uint32_t sve_z0_offset = GetGPRSize() + 16; sve_reg_offset = sve::SigRegsOffset() + reg_info->byte_offset - sve_z0_offset; } _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
