omjavaid added a comment. In D77045#1963896 <https://reviews.llvm.org/D77045#1963896>, @labath wrote:
> In D77045#1956879 <https://reviews.llvm.org/D77045#1956879>, @omjavaid wrote: > > > Adding a testcase would be tricky as these register overlap in memory and > > we store them with overlapping offsets with their children we should not > > need to invalidate the children when we write the parent but for some > > strange unexplainable reason QEMU was behaving strangely and not updating > > the first half in certain random cases. I just thought invalidation of > > children will force a read after write for that case. > > > Thanks for the explanation, but I'm afraid I still don't get what is going on > here. Can you walk me through the individual steps here? Something like: > > 1. user does "register write x0 xxxxxx" > 2. lldb translates that to the appropriate `p` packet > 3. ??? > 4. user does "register read w0" > 5. bad value comes out because... Let me debug it separately from SVE and I will get back to you with an update. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77045/new/ https://reviews.llvm.org/D77045 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
