https://github.com/DavidSpickett created https://github.com/llvm/llvm-project/pull/209124
Missed by #208838, which is a follow up to #188049 which changed the alignment rules. Some of these tests have incorrect outputs now and I will fix that later. For now at least they pass again. XML related tests are not being run in CI, which I will also address later. >From 316e96d692349028b64bd1e0cf671dc8a5a92ddd Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Mon, 13 Jul 2026 09:25:19 +0000 Subject: [PATCH] [lldb][test] Fix XML register info test Missed by #208838, which is a follow up to #188049 which changed the alignment rules. Some of these tests have incorrect outputs now and I will fix that later. For now at least they pass again. XML related tests are not being run in CI, which I will also address later. --- .../gdb_remote_client/TestXMLRegisterFlags.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py b/lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py index 972176a74640c..061090e9b6907 100644 --- a/lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py +++ b/lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py @@ -237,10 +237,10 @@ def test_big_endian_target_order(self): self.expect( "register read r0 fpc", substrs=[ - " r0 = 0x77777777eeeeeeee\n" - " = (msb = 0, lsb = 0)\n" - " fpc = 0x7777eeee\n" - " = (msb = 0, lsb = 0)\n" + " r0 = 0x77777777eeeeeeee\n" + " = (msb = 0, lsb = 0)\n" + " fpc = 0x7777eeee\n" + " = (msb = 0, lsb = 0)\n" ], ) _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
