Author: Jonas Devlieghere Date: 2026-01-16T15:24:25-08:00 New Revision: a84d74355e741ba5b9fd68eff24216d086de09f2
URL: https://github.com/llvm/llvm-project/commit/a84d74355e741ba5b9fd68eff24216d086de09f2 DIFF: https://github.com/llvm/llvm-project/commit/a84d74355e741ba5b9fd68eff24216d086de09f2.diff LOG: [lldb] Support both RISCV-32 and RISCV-64 in GetRegisterInfo (#176472) `GetRegisterInfo` hardcodes to use `RegisterInfoPOSIX_riscv64` instead of checking the triple to determine whether to use `RegisterInfoPOSIX_riscv64` or `RegisterInfoPOSIX_riscv32`. Someone put up a [PR](https://github.com/llvm/llvm-project/pull/175262) for this, but seems to have removed their account and the associated PR with it. Fixes #175092 Added: Modified: lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp Removed: ################################################################################ diff --git a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp index 2957cb716041d..4f4e6779072d2 100644 --- a/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp +++ b/lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp @@ -7,6 +7,8 @@ //===----------------------------------------------------------------------===// #include "EmulateInstructionRISCV.h" +#include "Plugins/Process/Utility/RegisterInfoInterface.h" +#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.h" #include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h" #include "Plugins/Process/Utility/lldb-riscv-register-enums.h" #include "RISCVCInstructions.h" @@ -1837,10 +1839,23 @@ EmulateInstructionRISCV::GetRegisterInfo(RegisterKind reg_kind, } } - RegisterInfoPOSIX_riscv64 reg_info(m_arch, - RegisterInfoPOSIX_riscv64::eRegsetMaskAll); - const RegisterInfo *array = reg_info.GetRegisterInfo(); - const uint32_t length = reg_info.GetRegisterCount(); + std::unique_ptr<RegisterInfoInterface> reg_info; + switch (m_arch.GetTriple().getArch()) { + case llvm::Triple::riscv32: + reg_info = std::make_unique<RegisterInfoPOSIX_riscv32>( + m_arch, RegisterInfoPOSIX_riscv32::eRegsetMaskAll); + break; + case llvm::Triple::riscv64: + reg_info = std::make_unique<RegisterInfoPOSIX_riscv64>( + m_arch, RegisterInfoPOSIX_riscv64::eRegsetMaskAll); + break; + default: + assert(false && "unsupported triple"); + return {}; + } + + const RegisterInfo *array = reg_info->GetRegisterInfo(); + const uint32_t length = reg_info->GetRegisterCount(); if (reg_index >= length || reg_kind != eRegisterKindLLDB) return {}; diff --git a/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp b/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp index 90d5a7c4f3b97..f713755c77a7c 100644 --- a/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp +++ b/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp @@ -16,6 +16,7 @@ #include "lldb/Utility/RegisterValue.h" #include "Plugins/Instruction/RISCV/EmulateInstructionRISCV.h" +#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.h" #include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h" #include "Plugins/Process/Utility/lldb-riscv-register-enums.h" @@ -806,3 +807,19 @@ TEST_F(RISCVEmulatorTester, TestFMV_D_XInst) { ASSERT_TRUE(this->Execute(*decode, false)); ASSERT_EQ(this->fpr.fpr[DecodeRD(FMV_D_XInst)], bits); } + +TEST_F(RISCVEmulatorTester, TestGetRegisterInfoRV64) { + // Test that GetRegisterInfo returns valid register info for riscv64. + auto reg_info = this->GetRegisterInfo(eRegisterKindLLDB, gpr_x1_riscv); + ASSERT_TRUE(reg_info.has_value()); + ASSERT_EQ(reg_info->byte_size, 8u); + ASSERT_STREQ(reg_info->name, "ra"); +} + +TEST_F(RISCVEmulatorTester32, TestGetRegisterInfoRV32) { + // Test that GetRegisterInfo returns valid register info for riscv32. + auto reg_info = this->GetRegisterInfo(eRegisterKindLLDB, gpr_x1_riscv); + ASSERT_TRUE(reg_info.has_value()); + ASSERT_EQ(reg_info->byte_size, 4u); + ASSERT_STREQ(reg_info->name, "ra"); +} _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
