================
@@ -1328,32 +1328,36 @@ class Executor {
m_emu, inst, 8, ZextD,
[](uint64_t a, uint64_t b) { return std::max(a, b); });
}
- template <typename T>
- bool F_Load(T inst, const fltSemantics &(*semantics)(),
- unsigned int numBits) {
+ template <typename I, typename T>
+ bool F_Load(I inst, const fltSemantics &(*semantics)()) {
return transformOptional(inst.rs1.Read(m_emu),
[&](auto &&rs1) {
- uint64_t addr = rs1 + uint64_t(inst.imm);
- uint64_t bits = *m_emu.ReadMem<uint64_t>(addr);
+ uint64_t addr =
+ rs1 + uint64_t(SignExt(inst.imm));
----------------
sga-sc wrote:
Should I create a new PR which fixes sign extention here and in
`LoadStoreAddr(EmulateInstructionRISCV &emulator, I inst)`?
https://github.com/llvm/llvm-project/pull/167490
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