================
@@ -26,19 +26,26 @@ def do_sequence_test(self, filename, bkpt_name):
substrs=["stopped", "stop reason = instruction step into"],
)
- pc = cur_thread.GetFrameAtIndex(0).GetPC()
+ # Get the instruction we stopped at
+ pc = cur_thread.GetFrameAtIndex(0).GetPCAddress()
+ inst = target.ReadInstructions(pc, 1).GetInstructionAtIndex(0)
- return pc - entry_pc
+ inst_mnemonic = inst.GetMnemonic(target)
+ inst_operands = inst.GetOperands(target)
+ if not inst_operands:
+ return inst_mnemonic
- @skipIf(archs=no_match("^rv.*"))
+ return f"{inst_mnemonic} {inst_operands}"
+
+ @skipIf(archs=no_match("^riscv.*"))
def test_cas(self):
"""
This test verifies LLDB instruction step handling of a proper lr/sc
pair.
"""
- difference = self.do_sequence_test("main", "cas")
- self.assertEqual(difference, 0x1A)
+ instruction = self.do_sequence_test("main", "cas")
+ self.assertEqual(instruction, "nop")
- @skipIf(archs=no_match("^rv.*"))
----------------
DavidSpickett wrote:
I assume this regex was never matching and so the test was always skipped,
probably also skipped on RISC-V until you fixed it here?
Istr updating this riscv regex in another test in the same way.
https://github.com/llvm/llvm-project/pull/156506
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