https://github.com/DavidSpickett commented:
Please note in the PR description that this is for live processes and core files (at least it looks like it is). I would also like to see test cases for both scenarios. Are your vector registers ever absent? Because in AArch64's case we assume we always have Neon (which is these days not 100% true but is pretty safe for any Linux) but we have to check whether SVE exists. I don't know if you'll have to do the same thing here. That said, if the devices without them are unsupported from your point of view, I wouldn't object to you assuming the vector registers exist, or doing so for the time being. As long as you make that clear in the PR's description. The code looks fine, a lot of boilerplate :) I've been looking at reducing this for AArch64, so one day we might have a better, data driven way to add registers. Note: this is my last day at work this year, back second week of January. Once this is in, that completes https://github.com/llvm/llvm-project/issues/112693. So I would like to know what the state of the test suite on LoongArch is at that point. It would be good to release note the major improvements for lldb 20. https://github.com/llvm/llvm-project/pull/120664 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
