Martin =?utf-8?q?Storsjö?= <[email protected]>,Thomas Fransham
<[email protected]>,davidtrevelyan
<[email protected]>,
Andrzej =?utf-8?q?Warzyński?= <[email protected]>,Louis Dionne
<[email protected]>,Alex =?utf-8?q?Rønne?= Petersen <[email protected]>,lntue
<[email protected]>,Shih-Po Hung <[email protected]>,Peng Liu
<[email protected]>,Peng Liu <[email protected]>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/[email protected]>
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 8c4bc1e75de27adfbaead34b895b0efbaf17bd02
3b5b692134d48ce4ebc2f21b9a4b569d24ddf9a3 --extensions ,cpp,cppm,c,h --
clang/test/Format/error-unfound-files.cpp
flang/include/flang/Optimizer/Transforms/CUFCommon.h
flang/lib/Optimizer/Transforms/CUFCommon.cpp
libcxx/include/__locale_dir/locale_base_api/freebsd.h
clang/include/clang/Lex/Preprocessor.h
clang/include/clang/Serialization/ASTBitCodes.h
clang/lib/Basic/Targets/WebAssembly.cpp clang/lib/CodeGen/CodeGenFunction.cpp
clang/lib/Lex/HeaderSearch.cpp clang/lib/Serialization/ASTWriter.cpp
clang/test/CodeGen/rtsan_attribute_inserted.c
clang/test/CodeGen/rtsan_no_attribute_sanitizer_disabled.c
clang/test/Modules/no-external-type-id.cppm
clang/test/Preprocessor/wasm-target-features.c
clang/tools/clang-format/ClangFormat.cpp
compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
libc/src/math/generic/atan2.cpp libc/src/math/generic/cbrt.cpp
libc/src/math/generic/cbrtf.cpp libc/src/math/generic/log.cpp
libc/src/math/generic/log10.cpp libc/src/math/generic/log10f.cpp
libc/src/math/generic/log1p.cpp libc/src/math/generic/log2.cpp
libc/src/math/generic/log2f.cpp libc/src/math/generic/logf.cpp
libc/src/math/generic/pow.cpp libc/src/math/generic/powf.cpp
libc/src/math/generic/sin.cpp libc/src/math/generic/tan.cpp
libc/test/src/math/cbrt_test.cpp libc/test/src/math/smoke/HypotTest.h
libc/test/src/math/smoke/acosf_test.cpp
libc/test/src/math/smoke/acoshf_test.cpp
libc/test/src/math/smoke/asinf_test.cpp
libc/test/src/math/smoke/asinhf_test.cpp
libc/test/src/math/smoke/atan2_test.cpp libc/test/src/math/smoke/atanf_test.cpp
libc/test/src/math/smoke/atanhf_test.cpp libc/test/src/math/smoke/cbrt_test.cpp
libc/test/src/math/smoke/cbrtf_test.cpp libc/test/src/math/smoke/cos_test.cpp
libc/test/src/math/smoke/cosf_test.cpp libc/test/src/math/smoke/coshf_test.cpp
libc/test/src/math/smoke/cospif_test.cpp libc/test/src/math/smoke/erff_test.cpp
libc/test/src/math/smoke/exp10_test.cpp
libc/test/src/math/smoke/exp10f_test.cpp libc/test/src/math/smoke/exp2_test.cpp
libc/test/src/math/smoke/exp2f_test.cpp
libc/test/src/math/smoke/exp2m1f_test.cpp libc/test/src/math/smoke/exp_test.cpp
libc/test/src/math/smoke/expf_test.cpp libc/test/src/math/smoke/expm1_test.cpp
libc/test/src/math/smoke/expm1f_test.cpp
libc/test/src/math/smoke/hypotf_test.cpp
libc/test/src/math/smoke/log10_test.cpp
libc/test/src/math/smoke/log10f_test.cpp
libc/test/src/math/smoke/log1p_test.cpp
libc/test/src/math/smoke/log1pf_test.cpp libc/test/src/math/smoke/log2_test.cpp
libc/test/src/math/smoke/log2f_test.cpp libc/test/src/math/smoke/log_test.cpp
libc/test/src/math/smoke/logf_test.cpp libc/test/src/math/smoke/pow_test.cpp
libc/test/src/math/smoke/powf_test.cpp libc/test/src/math/smoke/sin_test.cpp
libc/test/src/math/smoke/sinf_test.cpp libc/test/src/math/smoke/sinhf_test.cpp
libc/test/src/math/smoke/sinpif_test.cpp libc/test/src/math/smoke/tan_test.cpp
libc/test/src/math/smoke/tanf_test.cpp libc/test/src/math/smoke/tanhf_test.cpp
libcxx/include/__locale_dir/locale_base_api.h libcxx/include/__vector/vector.h
libcxx/include/version
libcxx/test/std/containers/sequences/vector/vector.capacity/shrink_to_fit.pass.cpp
libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_iter_iter.pass.cpp
libcxx/test/std/language.support/support.limits/support.limits.general/optional.version.compile.pass.cpp
libcxx/test/std/language.support/support.limits/support.limits.general/variant.version.compile.pass.cpp
libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
libcxx/test/support/test_macros.h
lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
llvm/include/llvm/ADT/StringRef.h
llvm/include/llvm/Analysis/TargetLibraryInfo.h
llvm/include/llvm/Bitcode/LLVMBitCodes.h
llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
llvm/lib/Bitcode/Reader/BitcodeReader.cpp
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp llvm/lib/IR/Verifier.cpp
llvm/lib/Support/StringRef.cpp llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/lib/Target/X86/X86TargetTransformInfo.h
llvm/lib/Transforms/Instrumentation/RealtimeSanitizer.cpp
llvm/lib/Transforms/Utils/CodeExtractor.cpp
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
llvm/lib/Transforms/Vectorize/VPlan.h
llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
llvm/lib/Transforms/Vectorize/VPlanValue.h
llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
mlir/lib/Dialect/MemRef/Transforms/ExpandOps.cpp
mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
mlir/lib/Dialect/Vector/IR/VectorOps.cpp
mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
mlir/lib/Transforms/Utils/DialectConversion.cpp
libcxx/include/__locale_dir/locale_base_api/apple.h
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/libcxx/include/__vector/vector.h b/libcxx/include/__vector/vector.h
index 196c947e23..02f91b537c 100644
--- a/libcxx/include/__vector/vector.h
+++ b/libcxx/include/__vector/vector.h
@@ -1352,8 +1352,7 @@ vector<_Tp, _Allocator>::insert(const_iterator
__position, _InputIterator __firs
template <class _Tp, class _Allocator>
template <class _InputIterator, class _Sentinel>
_LIBCPP_CONSTEXPR_SINCE_CXX20 _LIBCPP_HIDE_FROM_ABI typename vector<_Tp,
_Allocator>::iterator
-vector<_Tp, _Allocator>::__insert_with_sentinel(const_iterator __position,
- _InputIterator __first, _Sentinel __last) {
+vector<_Tp, _Allocator>::__insert_with_sentinel(const_iterator __position,
_InputIterator __first, _Sentinel __last) {
difference_type __off = __position - begin();
pointer __p = this->__begin_ + __off;
allocator_type& __a = this->__alloc();
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index bae223243b..9abc2051bf 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -2293,143 +2293,221 @@ InstructionCost X86TTIImpl::getCastInstrCost(unsigned
Opcode, Type *Dst,
// 256-bit wide vectors.
static const TypeConversionCostKindTblEntry AVX512FConversionTbl[] = {
- { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, { 1, 1, 1, 1 } },
- { ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, { 3, 1, 1, 1 } },
- { ISD::FP_EXTEND, MVT::v16f64, MVT::v16f32, { 4, 1, 1, 1 } }, //
2*vcvtps2pd+vextractf64x4
- { ISD::FP_EXTEND, MVT::v16f32, MVT::v16f16, { 1, 1, 1, 1 } }, //
vcvtph2ps
- { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f16, { 2, 1, 1, 1 } }, //
vcvtph2ps+vcvtps2pd
- { ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, { 1, 1, 1, 1 } },
- { ISD::FP_ROUND, MVT::v16f16, MVT::v16f32, { 1, 1, 1, 1 } }, //
vcvtps2ph
-
- { ISD::TRUNCATE, MVT::v2i1, MVT::v2i8, { 3, 1, 1, 1 } }, //
sext+vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v4i1, MVT::v4i8, { 3, 1, 1, 1 } }, //
sext+vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v8i1, MVT::v8i8, { 3, 1, 1, 1 } }, //
sext+vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v16i1, MVT::v16i8, { 3, 1, 1, 1 } }, //
sext+vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v2i1, MVT::v2i16, { 3, 1, 1, 1 } }, //
sext+vpsllq+vptestmq
- { ISD::TRUNCATE, MVT::v4i1, MVT::v4i16, { 3, 1, 1, 1 } }, //
sext+vpsllq+vptestmq
- { ISD::TRUNCATE, MVT::v8i1, MVT::v8i16, { 3, 1, 1, 1 } }, //
sext+vpsllq+vptestmq
- { ISD::TRUNCATE, MVT::v16i1, MVT::v16i16, { 3, 1, 1, 1 } }, //
sext+vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v2i1, MVT::v2i32, { 2, 1, 1, 1 } }, // zmm
vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v4i1, MVT::v4i32, { 2, 1, 1, 1 } }, // zmm
vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v8i1, MVT::v8i32, { 2, 1, 1, 1 } }, // zmm
vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v16i1, MVT::v16i32, { 2, 1, 1, 1 } }, //
vpslld+vptestmd
- { ISD::TRUNCATE, MVT::v2i1, MVT::v2i64, { 2, 1, 1, 1 } }, // zmm
vpsllq+vptestmq
- { ISD::TRUNCATE, MVT::v4i1, MVT::v4i64, { 2, 1, 1, 1 } }, // zmm
vpsllq+vptestmq
- { ISD::TRUNCATE, MVT::v8i1, MVT::v8i64, { 2, 1, 1, 1 } }, //
vpsllq+vptestmq
- { ISD::TRUNCATE, MVT::v2i8, MVT::v2i32, { 2, 1, 1, 1 } }, // vpmovdb
- { ISD::TRUNCATE, MVT::v4i8, MVT::v4i32, { 2, 1, 1, 1 } }, // vpmovdb
- { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, { 2, 1, 1, 1 } }, // vpmovdb
- { ISD::TRUNCATE, MVT::v32i8, MVT::v16i32, { 2, 1, 1, 1 } }, // vpmovdb
- { ISD::TRUNCATE, MVT::v64i8, MVT::v16i32, { 2, 1, 1, 1 } }, // vpmovdb
- { ISD::TRUNCATE, MVT::v16i16, MVT::v16i32, { 2, 1, 1, 1 } }, // vpmovdw
- { ISD::TRUNCATE, MVT::v32i16, MVT::v16i32, { 2, 1, 1, 1 } }, // vpmovdw
- { ISD::TRUNCATE, MVT::v2i8, MVT::v2i64, { 2, 1, 1, 1 } }, // vpmovqb
- { ISD::TRUNCATE, MVT::v2i16, MVT::v2i64, { 1, 1, 1, 1 } }, // vpshufb
- { ISD::TRUNCATE, MVT::v8i8, MVT::v8i64, { 2, 1, 1, 1 } }, // vpmovqb
- { ISD::TRUNCATE, MVT::v16i8, MVT::v8i64, { 2, 1, 1, 1 } }, // vpmovqb
- { ISD::TRUNCATE, MVT::v32i8, MVT::v8i64, { 2, 1, 1, 1 } }, // vpmovqb
- { ISD::TRUNCATE, MVT::v64i8, MVT::v8i64, { 2, 1, 1, 1 } }, // vpmovqb
- { ISD::TRUNCATE, MVT::v8i16, MVT::v8i64, { 2, 1, 1, 1 } }, // vpmovqw
- { ISD::TRUNCATE, MVT::v16i16, MVT::v8i64, { 2, 1, 1, 1 } }, // vpmovqw
- { ISD::TRUNCATE, MVT::v32i16, MVT::v8i64, { 2, 1, 1, 1 } }, // vpmovqw
- { ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, { 1, 1, 1, 1 } }, // vpmovqd
- { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, { 1, 1, 1, 1 } }, // zmm
vpmovqd
- { ISD::TRUNCATE, MVT::v16i8, MVT::v16i64, { 5, 1, 1, 1 } },//
2*vpmovqd+concat+vpmovdb
-
- { ISD::TRUNCATE, MVT::v16i8, MVT::v16i16, { 3, 1, 1, 1 } }, // extend
to v16i32
- { ISD::TRUNCATE, MVT::v32i8, MVT::v32i16, { 8, 1, 1, 1 } },
- { ISD::TRUNCATE, MVT::v64i8, MVT::v32i16, { 8, 1, 1, 1 } },
-
- // Sign extend is zmm vpternlogd+vptruncdb.
- // Zero extend is zmm broadcast load+vptruncdw.
- { ISD::SIGN_EXTEND, MVT::v2i8, MVT::v2i1, { 3, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v2i8, MVT::v2i1, { 4, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v4i8, MVT::v4i1, { 3, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v4i8, MVT::v4i1, { 4, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v8i8, MVT::v8i1, { 3, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v8i8, MVT::v8i1, { 4, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v16i8, MVT::v16i1, { 3, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v16i8, MVT::v16i1, { 4, 1, 1, 1 } },
-
- // Sign extend is zmm vpternlogd+vptruncdw.
- // Zero extend is zmm vpternlogd+vptruncdw+vpsrlw.
- { ISD::SIGN_EXTEND, MVT::v2i16, MVT::v2i1, { 3, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v2i16, MVT::v2i1, { 4, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v4i16, MVT::v4i1, { 3, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v4i16, MVT::v4i1, { 4, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i1, { 3, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i1, { 4, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, { 3, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, { 4, 1, 1, 1 } },
-
- { ISD::SIGN_EXTEND, MVT::v2i32, MVT::v2i1, { 1, 1, 1, 1 } }, // zmm
vpternlogd
- { ISD::ZERO_EXTEND, MVT::v2i32, MVT::v2i1, { 2, 1, 1, 1 } }, // zmm
vpternlogd+psrld
- { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i1, { 1, 1, 1, 1 } }, // zmm
vpternlogd
- { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i1, { 2, 1, 1, 1 } }, // zmm
vpternlogd+psrld
- { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i1, { 1, 1, 1, 1 } }, // zmm
vpternlogd
- { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i1, { 2, 1, 1, 1 } }, // zmm
vpternlogd+psrld
- { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i1, { 1, 1, 1, 1 } }, // zmm
vpternlogq
- { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i1, { 2, 1, 1, 1 } }, // zmm
vpternlogq+psrlq
- { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i1, { 1, 1, 1, 1 } }, // zmm
vpternlogq
- { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i1, { 2, 1, 1, 1 } }, // zmm
vpternlogq+psrlq
-
- { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i1, { 1, 1, 1, 1 } }, //
vpternlogd
- { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i1, { 2, 1, 1, 1 } }, //
vpternlogd+psrld
- { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i1, { 1, 1, 1, 1 } }, //
vpternlogq
- { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i1, { 2, 1, 1, 1 } }, //
vpternlogq+psrlq
-
- { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, { 1, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, { 1, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, { 1, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, { 1, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, { 1, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, { 1, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, { 1, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, { 1, 1, 1, 1 } },
- { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i32, { 1, 1, 1, 1 } },
- { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i32, { 1, 1, 1, 1 } },
-
- { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i8, { 3, 1, 1, 1 } }, // FIXME:
May not be right
- { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i8, { 3, 1, 1, 1 } }, // FIXME:
May not be right
-
- { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i1, { 4, 1, 1, 1 } },
- { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i1, { 3, 1, 1, 1 } },
- { ISD::SINT_TO_FP, MVT::v8f64, MVT::v16i8, { 2, 1, 1, 1 } },
- { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i8, { 1, 1, 1, 1 } },
- { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i16, { 2, 1, 1, 1 } },
- { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, { 1, 1, 1, 1 } },
- { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i32, { 1, 1, 1, 1 } },
- { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i32, { 1, 1, 1, 1 } },
-
- { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i1, { 4, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i1, { 3, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v8f64, MVT::v16i8, { 2, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i8, { 1, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i16, { 2, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, { 1, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i32, { 1, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i32, { 1, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i64, {26, 1, 1, 1 } },
- { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i64, { 5, 1, 1, 1 } },
-
- { ISD::FP_TO_SINT, MVT::v16i8, MVT::v16f32, { 2, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v16i8, MVT::v16f64, { 7, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v32i8, MVT::v32f64, {15, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v64i8, MVT::v64f32, {11, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v64i8, MVT::v64f64, {31, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f64, { 3, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f64, { 7, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v32i16, MVT::v32f32, { 5, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v32i16, MVT::v32f64, {15, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v8i32, MVT::v8f64, { 1, 1, 1, 1 } },
- { ISD::FP_TO_SINT, MVT::v16i32, MVT::v16f64, { 3, 1, 1, 1 } },
-
- { ISD::FP_TO_UINT, MVT::v8i32, MVT::v8f64, { 1, 1, 1, 1 } },
- { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f64, { 3, 1, 1, 1 } },
- { ISD::FP_TO_UINT, MVT::v8i8, MVT::v8f64, { 3, 1, 1, 1 } },
- { ISD::FP_TO_UINT, MVT::v16i32, MVT::v16f32, { 1, 1, 1, 1 } },
- { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, { 3, 1, 1, 1 } },
- { ISD::FP_TO_UINT, MVT::v16i8, MVT::v16f32, { 3, 1, 1, 1 } },
+ {ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, {1, 1, 1, 1}},
+ {ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, {3, 1, 1, 1}},
+ {ISD::FP_EXTEND,
+ MVT::v16f64,
+ MVT::v16f32,
+ {4, 1, 1, 1}}, // 2*vcvtps2pd+vextractf64x4
+ {ISD::FP_EXTEND, MVT::v16f32, MVT::v16f16, {1, 1, 1, 1}}, // vcvtph2ps
+ {ISD::FP_EXTEND,
+ MVT::v8f64,
+ MVT::v8f16,
+ {2, 1, 1, 1}}, // vcvtph2ps+vcvtps2pd
+ {ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, {1, 1, 1, 1}},
+ {ISD::FP_ROUND, MVT::v16f16, MVT::v16f32, {1, 1, 1, 1}}, // vcvtps2ph
+
+ {ISD::TRUNCATE,
+ MVT::v2i1,
+ MVT::v2i8,
+ {3, 1, 1, 1}}, // sext+vpslld+vptestmd
+ {ISD::TRUNCATE,
+ MVT::v4i1,
+ MVT::v4i8,
+ {3, 1, 1, 1}}, // sext+vpslld+vptestmd
+ {ISD::TRUNCATE,
+ MVT::v8i1,
+ MVT::v8i8,
+ {3, 1, 1, 1}}, // sext+vpslld+vptestmd
+ {ISD::TRUNCATE,
+ MVT::v16i1,
+ MVT::v16i8,
+ {3, 1, 1, 1}}, // sext+vpslld+vptestmd
+ {ISD::TRUNCATE,
+ MVT::v2i1,
+ MVT::v2i16,
+ {3, 1, 1, 1}}, // sext+vpsllq+vptestmq
+ {ISD::TRUNCATE,
+ MVT::v4i1,
+ MVT::v4i16,
+ {3, 1, 1, 1}}, // sext+vpsllq+vptestmq
+ {ISD::TRUNCATE,
+ MVT::v8i1,
+ MVT::v8i16,
+ {3, 1, 1, 1}}, // sext+vpsllq+vptestmq
+ {ISD::TRUNCATE,
+ MVT::v16i1,
+ MVT::v16i16,
+ {3, 1, 1, 1}}, // sext+vpslld+vptestmd
+ {ISD::TRUNCATE,
+ MVT::v2i1,
+ MVT::v2i32,
+ {2, 1, 1, 1}}, // zmm vpslld+vptestmd
+ {ISD::TRUNCATE,
+ MVT::v4i1,
+ MVT::v4i32,
+ {2, 1, 1, 1}}, // zmm vpslld+vptestmd
+ {ISD::TRUNCATE,
+ MVT::v8i1,
+ MVT::v8i32,
+ {2, 1, 1, 1}}, // zmm vpslld+vptestmd
+ {ISD::TRUNCATE, MVT::v16i1, MVT::v16i32, {2, 1, 1, 1}}, //
vpslld+vptestmd
+ {ISD::TRUNCATE,
+ MVT::v2i1,
+ MVT::v2i64,
+ {2, 1, 1, 1}}, // zmm vpsllq+vptestmq
+ {ISD::TRUNCATE,
+ MVT::v4i1,
+ MVT::v4i64,
+ {2, 1, 1, 1}}, // zmm vpsllq+vptestmq
+ {ISD::TRUNCATE, MVT::v8i1, MVT::v8i64, {2, 1, 1, 1}}, //
vpsllq+vptestmq
+ {ISD::TRUNCATE, MVT::v2i8, MVT::v2i32, {2, 1, 1, 1}}, // vpmovdb
+ {ISD::TRUNCATE, MVT::v4i8, MVT::v4i32, {2, 1, 1, 1}}, // vpmovdb
+ {ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, {2, 1, 1, 1}}, // vpmovdb
+ {ISD::TRUNCATE, MVT::v32i8, MVT::v16i32, {2, 1, 1, 1}}, // vpmovdb
+ {ISD::TRUNCATE, MVT::v64i8, MVT::v16i32, {2, 1, 1, 1}}, // vpmovdb
+ {ISD::TRUNCATE, MVT::v16i16, MVT::v16i32, {2, 1, 1, 1}}, // vpmovdw
+ {ISD::TRUNCATE, MVT::v32i16, MVT::v16i32, {2, 1, 1, 1}}, // vpmovdw
+ {ISD::TRUNCATE, MVT::v2i8, MVT::v2i64, {2, 1, 1, 1}}, // vpmovqb
+ {ISD::TRUNCATE, MVT::v2i16, MVT::v2i64, {1, 1, 1, 1}}, // vpshufb
+ {ISD::TRUNCATE, MVT::v8i8, MVT::v8i64, {2, 1, 1, 1}}, // vpmovqb
+ {ISD::TRUNCATE, MVT::v16i8, MVT::v8i64, {2, 1, 1, 1}}, // vpmovqb
+ {ISD::TRUNCATE, MVT::v32i8, MVT::v8i64, {2, 1, 1, 1}}, // vpmovqb
+ {ISD::TRUNCATE, MVT::v64i8, MVT::v8i64, {2, 1, 1, 1}}, // vpmovqb
+ {ISD::TRUNCATE, MVT::v8i16, MVT::v8i64, {2, 1, 1, 1}}, // vpmovqw
+ {ISD::TRUNCATE, MVT::v16i16, MVT::v8i64, {2, 1, 1, 1}}, // vpmovqw
+ {ISD::TRUNCATE, MVT::v32i16, MVT::v8i64, {2, 1, 1, 1}}, // vpmovqw
+ {ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, {1, 1, 1, 1}}, // vpmovqd
+ {ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, {1, 1, 1, 1}}, // zmm vpmovqd
+ {ISD::TRUNCATE,
+ MVT::v16i8,
+ MVT::v16i64,
+ {5, 1, 1, 1}}, // 2*vpmovqd+concat+vpmovdb
+
+ {ISD::TRUNCATE,
+ MVT::v16i8,
+ MVT::v16i16,
+ {3, 1, 1, 1}}, // extend to v16i32
+ {ISD::TRUNCATE, MVT::v32i8, MVT::v32i16, {8, 1, 1, 1}},
+ {ISD::TRUNCATE, MVT::v64i8, MVT::v32i16, {8, 1, 1, 1}},
+
+ // Sign extend is zmm vpternlogd+vptruncdb.
+ // Zero extend is zmm broadcast load+vptruncdw.
+ {ISD::SIGN_EXTEND, MVT::v2i8, MVT::v2i1, {3, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v2i8, MVT::v2i1, {4, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v4i8, MVT::v4i1, {3, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v4i8, MVT::v4i1, {4, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v8i8, MVT::v8i1, {3, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v8i8, MVT::v8i1, {4, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v16i8, MVT::v16i1, {3, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v16i8, MVT::v16i1, {4, 1, 1, 1}},
+
+ // Sign extend is zmm vpternlogd+vptruncdw.
+ // Zero extend is zmm vpternlogd+vptruncdw+vpsrlw.
+ {ISD::SIGN_EXTEND, MVT::v2i16, MVT::v2i1, {3, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v2i16, MVT::v2i1, {4, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v4i16, MVT::v4i1, {3, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v4i16, MVT::v4i1, {4, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i1, {3, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i1, {4, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, {3, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, {4, 1, 1, 1}},
+
+ {ISD::SIGN_EXTEND, MVT::v2i32, MVT::v2i1, {1, 1, 1, 1}}, // zmm
vpternlogd
+ {ISD::ZERO_EXTEND,
+ MVT::v2i32,
+ MVT::v2i1,
+ {2, 1, 1, 1}}, // zmm vpternlogd+psrld
+ {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i1, {1, 1, 1, 1}}, // zmm
vpternlogd
+ {ISD::ZERO_EXTEND,
+ MVT::v4i32,
+ MVT::v4i1,
+ {2, 1, 1, 1}}, // zmm vpternlogd+psrld
+ {ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i1, {1, 1, 1, 1}}, // zmm
vpternlogd
+ {ISD::ZERO_EXTEND,
+ MVT::v8i32,
+ MVT::v8i1,
+ {2, 1, 1, 1}}, // zmm vpternlogd+psrld
+ {ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i1, {1, 1, 1, 1}}, // zmm
vpternlogq
+ {ISD::ZERO_EXTEND,
+ MVT::v2i64,
+ MVT::v2i1,
+ {2, 1, 1, 1}}, // zmm vpternlogq+psrlq
+ {ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i1, {1, 1, 1, 1}}, // zmm
vpternlogq
+ {ISD::ZERO_EXTEND,
+ MVT::v4i64,
+ MVT::v4i1,
+ {2, 1, 1, 1}}, // zmm vpternlogq+psrlq
+
+ {ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i1, {1, 1, 1, 1}}, // vpternlogd
+ {ISD::ZERO_EXTEND,
+ MVT::v16i32,
+ MVT::v16i1,
+ {2, 1, 1, 1}}, // vpternlogd+psrld
+ {ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i1, {1, 1, 1, 1}}, // vpternlogq
+ {ISD::ZERO_EXTEND,
+ MVT::v8i64,
+ MVT::v8i1,
+ {2, 1, 1, 1}}, // vpternlogq+psrlq
+
+ {ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, {1, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, {1, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, {1, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, {1, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, {1, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, {1, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, {1, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, {1, 1, 1, 1}},
+ {ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i32, {1, 1, 1, 1}},
+ {ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i32, {1, 1, 1, 1}},
+
+ {ISD::SIGN_EXTEND,
+ MVT::v32i16,
+ MVT::v32i8,
+ {3, 1, 1, 1}}, // FIXME: May not be right
+ {ISD::ZERO_EXTEND,
+ MVT::v32i16,
+ MVT::v32i8,
+ {3, 1, 1, 1}}, // FIXME: May not be right
+
+ {ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i1, {4, 1, 1, 1}},
+ {ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i1, {3, 1, 1, 1}},
+ {ISD::SINT_TO_FP, MVT::v8f64, MVT::v16i8, {2, 1, 1, 1}},
+ {ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i8, {1, 1, 1, 1}},
+ {ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i16, {2, 1, 1, 1}},
+ {ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, {1, 1, 1, 1}},
+ {ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i32, {1, 1, 1, 1}},
+ {ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i32, {1, 1, 1, 1}},
+
+ {ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i1, {4, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i1, {3, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v8f64, MVT::v16i8, {2, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i8, {1, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i16, {2, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, {1, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i32, {1, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i32, {1, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i64, {26, 1, 1, 1}},
+ {ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i64, {5, 1, 1, 1}},
+
+ {ISD::FP_TO_SINT, MVT::v16i8, MVT::v16f32, {2, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v16i8, MVT::v16f64, {7, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v32i8, MVT::v32f64, {15, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v64i8, MVT::v64f32, {11, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v64i8, MVT::v64f64, {31, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f64, {3, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f64, {7, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v32i16, MVT::v32f32, {5, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v32i16, MVT::v32f64, {15, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v8i32, MVT::v8f64, {1, 1, 1, 1}},
+ {ISD::FP_TO_SINT, MVT::v16i32, MVT::v16f64, {3, 1, 1, 1}},
+
+ {ISD::FP_TO_UINT, MVT::v8i32, MVT::v8f64, {1, 1, 1, 1}},
+ {ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f64, {3, 1, 1, 1}},
+ {ISD::FP_TO_UINT, MVT::v8i8, MVT::v8f64, {3, 1, 1, 1}},
+ {ISD::FP_TO_UINT, MVT::v16i32, MVT::v16f32, {1, 1, 1, 1}},
+ {ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, {3, 1, 1, 1}},
+ {ISD::FP_TO_UINT, MVT::v16i8, MVT::v16f32, {3, 1, 1, 1}},
};
static const TypeConversionCostKindTblEntry AVX512BWVLConversionTbl[] {
@@ -2977,14 +3055,17 @@ InstructionCost X86TTIImpl::getCastInstrCost(unsigned
Opcode, Type *Dst,
};
static const TypeConversionCostKindTblEntry F16ConversionTbl[] = {
- { ISD::FP_ROUND, MVT::f16, MVT::f32, { 1, 1, 1, 1 } },
- { ISD::FP_ROUND, MVT::v8f16, MVT::v8f32, { 1, 1, 1, 1 } },
- { ISD::FP_ROUND, MVT::v4f16, MVT::v4f32, { 1, 1, 1, 1 } },
- { ISD::FP_EXTEND, MVT::f32, MVT::f16, { 1, 1, 1, 1 } },
- { ISD::FP_EXTEND, MVT::f64, MVT::f16, { 2, 1, 1, 1 } }, //
vcvtph2ps+vcvtps2pd
- { ISD::FP_EXTEND, MVT::v8f32, MVT::v8f16, { 1, 1, 1, 1 } },
- { ISD::FP_EXTEND, MVT::v4f32, MVT::v4f16, { 1, 1, 1, 1 } },
- { ISD::FP_EXTEND, MVT::v4f64, MVT::v4f16, { 2, 1, 1, 1 } }, //
vcvtph2ps+vcvtps2pd
+ {ISD::FP_ROUND, MVT::f16, MVT::f32, {1, 1, 1, 1}},
+ {ISD::FP_ROUND, MVT::v8f16, MVT::v8f32, {1, 1, 1, 1}},
+ {ISD::FP_ROUND, MVT::v4f16, MVT::v4f32, {1, 1, 1, 1}},
+ {ISD::FP_EXTEND, MVT::f32, MVT::f16, {1, 1, 1, 1}},
+ {ISD::FP_EXTEND, MVT::f64, MVT::f16, {2, 1, 1, 1}}, //
vcvtph2ps+vcvtps2pd
+ {ISD::FP_EXTEND, MVT::v8f32, MVT::v8f16, {1, 1, 1, 1}},
+ {ISD::FP_EXTEND, MVT::v4f32, MVT::v4f16, {1, 1, 1, 1}},
+ {ISD::FP_EXTEND,
+ MVT::v4f64,
+ MVT::v4f16,
+ {2, 1, 1, 1}}, // vcvtph2ps+vcvtps2pd
};
// Attempt to map directly to (simple) MVT types to let us match custom
entries.
``````````
</details>
https://github.com/llvm/llvm-project/pull/113727
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