https://github.com/lawn123 updated https://github.com/llvm/llvm-project/pull/112296
>From ba485de763a08f6ff3c7468c1a1bfbbfb25ac48f Mon Sep 17 00:00:00 2001 From: Liu An <li...@loongson.cn> Date: Tue, 15 Oct 2024 10:31:35 +0800 Subject: [PATCH 1/3] [LoongArch64]: Add support for LoongArch64 in elf-core for lldb --- .../Plugins/Process/elf-core/CMakeLists.txt | 1 + .../RegisterContextPOSIXCore_loongarch64.cpp | 87 +++++++++++++++++++ .../RegisterContextPOSIXCore_loongarch64.h | 62 +++++++++++++ .../Process/elf-core/ThreadElfCore.cpp | 6 ++ 4 files changed, 156 insertions(+) create mode 100644 lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp create mode 100644 lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h diff --git a/lldb/source/Plugins/Process/elf-core/CMakeLists.txt b/lldb/source/Plugins/Process/elf-core/CMakeLists.txt index 72925c835b5c89..7473fa8d41ccb3 100644 --- a/lldb/source/Plugins/Process/elf-core/CMakeLists.txt +++ b/lldb/source/Plugins/Process/elf-core/CMakeLists.txt @@ -10,6 +10,7 @@ add_lldb_library(lldbPluginProcessElfCore PLUGIN RegisterContextPOSIXCore_s390x.cpp RegisterContextPOSIXCore_x86_64.cpp RegisterContextPOSIXCore_riscv64.cpp + RegisterContextPOSIXCore_loongarch64.cpp RegisterUtilities.cpp LINK_LIBS diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp new file mode 100644 index 00000000000000..af192ecbe01e1b --- /dev/null +++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp @@ -0,0 +1,87 @@ +//===-- RegisterContextPOSIXCore_loongarch64.cpp +//------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "RegisterContextPOSIXCore_loongarch64.h" + +#include "lldb/Utility/DataBufferHeap.h" + +using namespace lldb_private; + +std::unique_ptr<RegisterContextCorePOSIX_loongarch64> +RegisterContextCorePOSIX_loongarch64::Create(Thread &thread, + const ArchSpec &arch, + const DataExtractor &gpregset, + llvm::ArrayRef<CoreNote> notes) { + return std::unique_ptr<RegisterContextCorePOSIX_loongarch64>( + new RegisterContextCorePOSIX_loongarch64( + thread, + std::make_unique<RegisterInfoPOSIX_loongarch64>(arch, Flags()), + gpregset, notes)); +} + +RegisterContextCorePOSIX_loongarch64::RegisterContextCorePOSIX_loongarch64( + Thread &thread, + std::unique_ptr<RegisterInfoPOSIX_loongarch64> register_info, + const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes) + : RegisterContextPOSIX_loongarch64(thread, std::move(register_info)) { + + m_gpr_buffer = std::make_shared<DataBufferHeap>(gpregset.GetDataStart(), + gpregset.GetByteSize()); + m_gpr.SetData(m_gpr_buffer); + m_gpr.SetByteOrder(gpregset.GetByteOrder()); + + ArchSpec arch = m_register_info_up->GetTargetArchitecture(); + DataExtractor fpregset = getRegset(notes, arch.GetTriple(), FPR_Desc); + m_fpr_buffer = std::make_shared<DataBufferHeap>(fpregset.GetDataStart(), + fpregset.GetByteSize()); + m_fpr.SetData(m_fpr_buffer); + m_fpr.SetByteOrder(fpregset.GetByteOrder()); +} + +RegisterContextCorePOSIX_loongarch64::~RegisterContextCorePOSIX_loongarch64() = + default; + +bool RegisterContextCorePOSIX_loongarch64::ReadGPR() { return true; } + +bool RegisterContextCorePOSIX_loongarch64::ReadFPR() { return true; } + +bool RegisterContextCorePOSIX_loongarch64::WriteGPR() { + assert(false && "Writing registers is not allowed for core dumps"); + return false; +} + +bool RegisterContextCorePOSIX_loongarch64::WriteFPR() { + assert(false && "Writing registers is not allowed for core dumps"); + return false; +} + +bool RegisterContextCorePOSIX_loongarch64::ReadRegister( + const RegisterInfo *reg_info, RegisterValue &value) { + const uint8_t *src = nullptr; + lldb::offset_t offset = reg_info->byte_offset; + + if (IsGPR(reg_info->kinds[lldb::eRegisterKindLLDB])) { + src = m_gpr.GetDataStart(); + } else if (IsFPR(reg_info->kinds[lldb::eRegisterKindLLDB])) { + src = m_fpr.GetDataStart(); + offset -= GetGPRSize(); + } else { + return false; + } + + Status error; + value.SetFromMemoryData(*reg_info, src + offset, reg_info->byte_size, + lldb::eByteOrderLittle, error); + return error.Success(); +} + +bool RegisterContextCorePOSIX_loongarch64::WriteRegister( + const RegisterInfo *reg_info, const RegisterValue &value) { + return false; +} diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h new file mode 100644 index 00000000000000..44ee44badc5961 --- /dev/null +++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h @@ -0,0 +1,62 @@ +//===-- RegisterContextPOSIXCore_loongarch64.h ----------------------*- C++ +//-*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLDB_SOURCE_PLUGINS_PROCESS_ELF_CORE_REGISTERCONTEXTPOSIXCORE_LOONGARCH64_H +#define LLDB_SOURCE_PLUGINS_PROCESS_ELF_CORE_REGISTERCONTEXTPOSIXCORE_LOONGARCH64_H + +#include "Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h" +#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h" + +#include "Plugins/Process/elf-core/RegisterUtilities.h" +#include "lldb/Target/Thread.h" +#include "lldb/Utility/DataExtractor.h" +#include "lldb/Utility/RegisterValue.h" + +#include <memory> + +class RegisterContextCorePOSIX_loongarch64 + : public RegisterContextPOSIX_loongarch64 { +public: + static std::unique_ptr<RegisterContextCorePOSIX_loongarch64> + Create(lldb_private::Thread &thread, const lldb_private::ArchSpec &arch, + const lldb_private::DataExtractor &gpregset, + llvm::ArrayRef<lldb_private::CoreNote> notes); + + ~RegisterContextCorePOSIX_loongarch64() override; + + bool ReadRegister(const lldb_private::RegisterInfo *reg_info, + lldb_private::RegisterValue &value) override; + + bool WriteRegister(const lldb_private::RegisterInfo *reg_info, + const lldb_private::RegisterValue &value) override; + +protected: + RegisterContextCorePOSIX_loongarch64( + lldb_private::Thread &thread, + std::unique_ptr<RegisterInfoPOSIX_loongarch64> register_info, + const lldb_private::DataExtractor &gpregset, + llvm::ArrayRef<lldb_private::CoreNote> notes); + + bool ReadGPR() override; + + bool ReadFPR() override; + + bool WriteGPR() override; + + bool WriteFPR() override; + +private: + lldb::DataBufferSP m_gpr_buffer; + lldb::DataBufferSP m_fpr_buffer; + + lldb_private::DataExtractor m_gpr; + lldb_private::DataExtractor m_fpr; +}; + +#endif // LLDB_SOURCE_PLUGINS_PROCESS_ELF_CORE_REGISTERCONTEXTPOSIXCORE_LOONGARCH64_H diff --git a/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp b/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp index 52b96052bdbeca..f2838087298efb 100644 --- a/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp +++ b/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp @@ -33,6 +33,7 @@ #include "RegisterContextLinuxCore_x86_64.h" #include "RegisterContextPOSIXCore_arm.h" #include "RegisterContextPOSIXCore_arm64.h" +#include "RegisterContextPOSIXCore_loongarch64.h" #include "RegisterContextPOSIXCore_mips64.h" #include "RegisterContextPOSIXCore_powerpc.h" #include "RegisterContextPOSIXCore_ppc64le.h" @@ -171,6 +172,7 @@ ThreadElfCore::CreateRegisterContextForFrame(StackFrame *frame) { if (!reg_interface && arch.GetMachine() != llvm::Triple::aarch64 && arch.GetMachine() != llvm::Triple::arm && + arch.GetMachine() != llvm::Triple::loongarch64 && arch.GetMachine() != llvm::Triple::riscv64) { LLDB_LOGF(log, "elf-core::%s:: Architecture(%d) or OS(%d) not supported", __FUNCTION__, arch.GetMachine(), arch.GetTriple().getOS()); @@ -187,6 +189,10 @@ ThreadElfCore::CreateRegisterContextForFrame(StackFrame *frame) { *this, std::make_unique<RegisterInfoPOSIX_arm>(arch), m_gpregset_data, m_notes); break; + case llvm::Triple::loongarch64: + m_thread_reg_ctx_sp = RegisterContextCorePOSIX_loongarch64::Create( + *this, arch, m_gpregset_data, m_notes); + break; case llvm::Triple::riscv64: m_thread_reg_ctx_sp = RegisterContextCorePOSIX_riscv64::Create( *this, arch, m_gpregset_data, m_notes); >From 355442e1f39adc07da234ecdbc1d0164793a97ad Mon Sep 17 00:00:00 2001 From: Liu An <li...@loongson.cn> Date: Thu, 17 Oct 2024 16:25:40 +0800 Subject: [PATCH 2/3] Fix formatting and add two testcases in TestLinuxCore.py --- .../RegisterContextPOSIX_loongarch64.cpp | 2 +- .../RegisterContextPOSIXCore_loongarch64.cpp | 13 +- .../RegisterContextPOSIXCore_loongarch64.h | 9 +- .../postmortem/elf-core/TestLinuxCore.py | 113 ++++++++++++++++++ .../elf-core/linux-loongarch64.core | Bin 0 -> 114688 bytes .../postmortem/elf-core/linux-loongarch64.out | Bin 0 -> 2944 bytes 6 files changed, 121 insertions(+), 16 deletions(-) create mode 100644 lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.core create mode 100755 lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.out diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp index a48a58f28f7aad..49f371fb949b7b 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp +++ b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp @@ -58,7 +58,7 @@ RegisterContextPOSIX_loongarch64::GetRegisterInfoAtIndex(size_t reg) { } size_t RegisterContextPOSIX_loongarch64::GetRegisterSetCount() { - return m_register_info_up->GetRegisterCount(); + return m_register_info_up->GetRegisterSetCount(); } const lldb_private::RegisterSet * diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp index af192ecbe01e1b..795ca2d9c7cdcd 100644 --- a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp +++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp @@ -1,5 +1,4 @@ -//===-- RegisterContextPOSIXCore_loongarch64.cpp -//------------------------------===// +//===-- RegisterContextPOSIXCore_loongarch64.cpp ------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -31,16 +30,14 @@ RegisterContextCorePOSIX_loongarch64::RegisterContextCorePOSIX_loongarch64( const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes) : RegisterContextPOSIX_loongarch64(thread, std::move(register_info)) { - m_gpr_buffer = std::make_shared<DataBufferHeap>(gpregset.GetDataStart(), - gpregset.GetByteSize()); - m_gpr.SetData(m_gpr_buffer); + m_gpr.SetData(std::make_shared<DataBufferHeap>(gpregset.GetDataStart(), + gpregset.GetByteSize())); m_gpr.SetByteOrder(gpregset.GetByteOrder()); ArchSpec arch = m_register_info_up->GetTargetArchitecture(); DataExtractor fpregset = getRegset(notes, arch.GetTriple(), FPR_Desc); - m_fpr_buffer = std::make_shared<DataBufferHeap>(fpregset.GetDataStart(), - fpregset.GetByteSize()); - m_fpr.SetData(m_fpr_buffer); + m_fpr.SetData(std::make_shared<DataBufferHeap>(fpregset.GetDataStart(), + fpregset.GetByteSize())); m_fpr.SetByteOrder(fpregset.GetByteOrder()); } diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h index 44ee44badc5961..80d9218e80c832 100644 --- a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h +++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h @@ -1,5 +1,4 @@ -//===-- RegisterContextPOSIXCore_loongarch64.h ----------------------*- C++ -//-*-===// +//===-- RegisterContextPOSIXCore_loongarch64.h ----------------------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -20,8 +19,7 @@ #include <memory> -class RegisterContextCorePOSIX_loongarch64 - : public RegisterContextPOSIX_loongarch64 { +class RegisterContextCorePOSIX_loongarch64 : public RegisterContextPOSIX_loongarch64 { public: static std::unique_ptr<RegisterContextCorePOSIX_loongarch64> Create(lldb_private::Thread &thread, const lldb_private::ArchSpec &arch, @@ -52,9 +50,6 @@ class RegisterContextCorePOSIX_loongarch64 bool WriteFPR() override; private: - lldb::DataBufferSP m_gpr_buffer; - lldb::DataBufferSP m_fpr_buffer; - lldb_private::DataExtractor m_gpr; lldb_private::DataExtractor m_fpr; }; diff --git a/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py b/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py index 7e8531c88bf34c..0d0dbee7deafa1 100644 --- a/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py +++ b/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py @@ -23,6 +23,7 @@ class LinuxCoreTestCase(TestBase): _ppc64le_pid = 28147 _riscv64_gpr_fpr_pid = 1089 _riscv64_gpr_only_pid = 97 + _loongarch64_pid = 456735 _aarch64_regions = 4 _i386_regions = 4 @@ -30,6 +31,7 @@ class LinuxCoreTestCase(TestBase): _s390x_regions = 2 _ppc64le_regions = 2 _riscv64_regions = 4 + _loongarch64_regions = 4 @skipIfLLVMTargetMissing("AArch64") def test_aarch64(self): @@ -82,6 +84,16 @@ def test_riscv64_gpr_only(self): "a.out", ) + @skipIfLLVMTargetMissing("LoongArch") + def test_loongarch64(self): + """Test that lldb can read the process information from an loongarch64 linux core file.""" + self.do_test( + "linux-loongarch64", + self._loongarch64_pid, + self._loongarch64_regions, + "a.out", + ) + @skipIfLLVMTargetMissing("X86") def test_same_pid_running(self): """Test that we read the information from the core correctly even if we have a running @@ -833,6 +845,107 @@ def test_riscv64_regs_gpr_only(self): substrs=["registers were unavailable"], ) + @skipIfLLVMTargetMissing("LoongArch") + def test_loongarch64_regs(self): + # check registers using 64 bit LoongArch64 core file containing GP-registers only + target = self.dbg.CreateTarget(None) + self.assertTrue(target, VALID_TARGET) + process = target.LoadCore("linux-loongarch64.core") + + values = {} + values["r0"] = "0x0" + values["r1"] = "0x000000012000016c" + values["r2"] = "0x0" + values["r3"] = "0x00007ffffb8249e0" + values["r4"] = "0x0" + values["r5"] = "0x000000012000010c" + values["r6"] = "0x0" + values["r7"] = "0x0" + values["r8"] = "0x0" + values["r9"] = "0x0" + values["r10"] = "0x0" + values["r11"] = "0x00000000000000dd" + values["r12"] = "0x0" + values["r13"] = "0x000000000000002f" + values["r14"] = "0x0" + values["r15"] = "0x0" + values["r16"] = "0x0" + values["r17"] = "0x0" + values["r18"] = "0x0" + values["r19"] = "0x0" + values["r20"] = "0x0" + values["r21"] = "0x0" + values["r22"] = "0x00007ffffb824a10" + values["r23"] = "0x0" + values["r24"] = "0x0" + values["r25"] = "0x0" + values["r26"] = "0x0" + values["r27"] = "0x0" + values["r28"] = "0x0" + values["r29"] = "0x0" + values["r30"] = "0x0" + values["r31"] = "0x0" + values["orig_a0"] = "0x0000555556b62d50" + values["pc"] = "0x000000012000012c" + + fpr_values = {} + fpr_values["f0"] = "0x00000000ffffff05" + fpr_values["f1"] = "0x2525252525252525" + fpr_values["f2"] = "0x2525252525560005" + fpr_values["f3"] = "0x000000000000ffff" + fpr_values["f4"] = "0x0" + fpr_values["f5"] = "0x0000000000000008" + fpr_values["f6"] = "0x0f0e0d0c0b0a0908" + fpr_values["f7"] = "0xffffffffffffffff" + fpr_values["f8"] = "0x6261747563657845" + fpr_values["f9"] = "0x766173206562206c" + fpr_values["f10"] = "0xffffffffffffffff" + fpr_values["f11"] = "0xffffffffffffffff" + fpr_values["f12"] = "0xffffffffffffffff" + fpr_values["f13"] = "0xffffffffffffffff" + fpr_values["f14"] = "0xffffffffffffffff" + fpr_values["f15"] = "0xffffffffffffffff" + fpr_values["f16"] = "0xffffffffffffffff" + fpr_values["f17"] = "0xffffffffffffffff" + fpr_values["f18"] = "0xffffffffffffffff" + fpr_values["f19"] = "0xffffffffffffffff" + fpr_values["f20"] = "0xffffffffffffffff" + fpr_values["f21"] = "0xffffffffffffffff" + fpr_values["f22"] = "0xffffffffffffffff" + fpr_values["f23"] = "0xffffffffffffffff" + fpr_values["f24"] = "0xffffffffffffffff" + fpr_values["f25"] = "0xffffffffffffffff" + fpr_values["f26"] = "0xffffffffffffffff" + fpr_values["f27"] = "0xffffffffffffffff" + fpr_values["f28"] = "0xffffffffffffffff" + fpr_values["f29"] = "0xffffffffffffffff" + fpr_values["f30"] = "0xffffffffffffffff" + fpr_values["f31"] = "0xffffffffffffffff" + fpr_values["fcc0"] = "0x01" + fpr_values["fcc1"] = "0x0" + fpr_values["fcc2"] = "0x01" + fpr_values["fcc3"] = "0x01" + fpr_values["fcc4"] = "0x01" + fpr_values["fcc5"] = "0x01" + fpr_values["fcc6"] = "0x0" + fpr_values["fcc7"] = "0x01" + fpr_values["fcsr"] = "0x0" + + for regname, value in values.items(): + self.expect( + "register read {}".format(regname), + substrs=["{} = {}".format(regname, value)], + ) + + for regname, value in fpr_values.items(): + self.expect( + "register read {}".format(regname), + substrs=["{} = {}".format(regname, value)], + ) + + self.expect("register read --all") + + def test_get_core_file_api(self): """ Test SBProcess::GetCoreFile() API can successfully get the core file. diff --git a/lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.core b/lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.core new file mode 100644 index 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0000000000000000000000000000000000000000..ea3c61ac5bae7cc26b3afa886831d723036e021a GIT binary patch literal 2944 zcmbtWO>7%Q6n?WC$9DXaq-m%_C~-tk9Yod%vO+0xYZ}uKDS}e*Q=v-EuDyvDyt`q& zj?yX;4i~r}kxN0Ssz9iR0tYTgJ)kN`aLa)c962E>aX?7idNA+J>^SMh0VGD6c{AVp zzBfCwZ)W$M=a(-ijDai)h*6tCme7)P#6)L-W2ZqyPa0A{oQUKI%XQf0wx9@5S{bkp zVXF6pn=I!`I~Cy45|_%$zxuU)(fv>DP{1PnajYuV#TQ?NlQ)0KR6e`+<K9c1;h!^a z{r1-@U*4^jI?BeUyVD!HyUO=QXFB=*wz7Bk-1MH&$)&z+D<3eJ#vM_SldB>p3$RQY zoiy!z-4Ewc`*EN>-^pRD+%|({(jqs9+<ko;^(&|?@fb>SOXzOh?~L`qD0DvWyv}ti zs4JnaE#{T$V%IJK+hlA!rNSe)whY$Oold8K7Ru?_@^w~DJ_IX2l~Zb#d{~#!UqVa% z7q;1Tg&4K(%93*hU3KIT7dhE3=ZfGgE-akM=E|mF=}va8pgpC{&J?DD9z2O6@zO=g zB!f))ilX%>zatg_#>st29GoOl6l*VK#6|~8^|ynl{22+lahci+Fi2L}aiO2}``C@H zx-PJ2suW6ScH<Tiu|o6&@9tbyD3ha8-;iVHA_j}gU@CQD<cJd&)Gx3ZFmw+XOUdWt zdyY7}!NW2c76WlTJr%G5sIfDX?AgRKlLJd5N(SeOfSMLiLLllOBqn1^BX~xJ+2iSv zggP-kG0cudhfd&TY3$q>3KAG1acYd<Qf6z6A-jJH5{a`3HI2*A7|zp!6B}ixI5{2x znqlBD@!A-!;uEY9h`|%IBF65g@vvi|5eFt1y(5K9D1+j4;|LWD;)>jmk;s6`;zPh9 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.../RegisterContextPOSIXCore_loongarch64.cpp | 2 +- .../postmortem/elf-core/TestLinuxCore.py | 60 +++++++++---------- 2 files changed, 31 insertions(+), 31 deletions(-) diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp index 795ca2d9c7cdcd..b6057b66255c17 100644 --- a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp +++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp @@ -1,4 +1,4 @@ -//===-- RegisterContextPOSIXCore_loongarch64.cpp ------------------------------===// +//===-- RegisterContextPOSIXCore_loongarch64.cpp --------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. diff --git a/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py b/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py index 0d0dbee7deafa1..12ff01bad1bdac 100644 --- a/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py +++ b/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py @@ -853,38 +853,38 @@ def test_loongarch64_regs(self): process = target.LoadCore("linux-loongarch64.core") values = {} - values["r0"] = "0x0" + values["r0"] = "0x0000000000000000" values["r1"] = "0x000000012000016c" - values["r2"] = "0x0" + values["r2"] = "0x0000000000000000" values["r3"] = "0x00007ffffb8249e0" - values["r4"] = "0x0" + values["r4"] = "0x0000000000000000" values["r5"] = "0x000000012000010c" - values["r6"] = "0x0" - values["r7"] = "0x0" - values["r8"] = "0x0" - values["r9"] = "0x0" - values["r10"] = "0x0" + values["r6"] = "0x0000000000000000" + values["r7"] = "0x0000000000000000" + values["r8"] = "0x0000000000000000" + values["r9"] = "0x0000000000000000" + values["r10"] = "0x0000000000000000" values["r11"] = "0x00000000000000dd" - values["r12"] = "0x0" + values["r12"] = "0x0000000000000000" values["r13"] = "0x000000000000002f" - values["r14"] = "0x0" - values["r15"] = "0x0" - values["r16"] = "0x0" - values["r17"] = "0x0" - values["r18"] = "0x0" - values["r19"] = "0x0" - values["r20"] = "0x0" - values["r21"] = "0x0" + values["r14"] = "0x0000000000000000" + values["r15"] = "0x0000000000000000" + values["r16"] = "0x0000000000000000" + values["r17"] = "0x0000000000000000" + values["r18"] = "0x0000000000000000" + values["r19"] = "0x0000000000000000" + values["r20"] = "0x0000000000000000" + values["r21"] = "0x0000000000000000" values["r22"] = "0x00007ffffb824a10" - values["r23"] = "0x0" - values["r24"] = "0x0" - values["r25"] = "0x0" - values["r26"] = "0x0" - values["r27"] = "0x0" - values["r28"] = "0x0" - values["r29"] = "0x0" - values["r30"] = "0x0" - values["r31"] = "0x0" + values["r23"] = "0x0000000000000000" + values["r24"] = "0x0000000000000000" + values["r25"] = "0x0000000000000000" + values["r26"] = "0x0000000000000000" + values["r27"] = "0x0000000000000000" + values["r28"] = "0x0000000000000000" + values["r29"] = "0x0000000000000000" + values["r30"] = "0x0000000000000000" + values["r31"] = "0x0000000000000000" values["orig_a0"] = "0x0000555556b62d50" values["pc"] = "0x000000012000012c" @@ -893,7 +893,7 @@ def test_loongarch64_regs(self): fpr_values["f1"] = "0x2525252525252525" fpr_values["f2"] = "0x2525252525560005" fpr_values["f3"] = "0x000000000000ffff" - fpr_values["f4"] = "0x0" + fpr_values["f4"] = "0x0000000000000000" fpr_values["f5"] = "0x0000000000000008" fpr_values["f6"] = "0x0f0e0d0c0b0a0908" fpr_values["f7"] = "0xffffffffffffffff" @@ -922,14 +922,14 @@ def test_loongarch64_regs(self): fpr_values["f30"] = "0xffffffffffffffff" fpr_values["f31"] = "0xffffffffffffffff" fpr_values["fcc0"] = "0x01" - fpr_values["fcc1"] = "0x0" + fpr_values["fcc1"] = "0x00" fpr_values["fcc2"] = "0x01" fpr_values["fcc3"] = "0x01" fpr_values["fcc4"] = "0x01" fpr_values["fcc5"] = "0x01" - fpr_values["fcc6"] = "0x0" + fpr_values["fcc6"] = "0x00" fpr_values["fcc7"] = "0x01" - fpr_values["fcsr"] = "0x0" + fpr_values["fcsr"] = "0x00" for regname, value in values.items(): self.expect( _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
