================
@@ -61,3 +65,19 @@ def test_fpmr_register(self):
# 0 means the program found the new value in the sysreg as expected.
self.expect("continue", substrs=["exited with status = 0"])
+
+ @skipIfLLVMTargetMissing("AArch64")
+ def test_fpmr_register_core(self):
+ if not self.isAArch64FPMR():
+ self.skipTest("FPMR must be present.")
+
+ self.runCmd("target create --core corefile")
+
+ self.expect(
+ "register read --all",
+ substrs=[
+ "Floating Point Mode Register",
+ f"fpmr = {self.EXPECTED_FPMR:#018x}",
+ ],
+ )
+ self.expect("register read fpmr", substrs=self.EXPECTED_FPMR_FIELDS)
----------------
DavidSpickett wrote:
Note that for core file debug we aren't sending the register info via XML, so I
don't need to skip this if XML support is not enabled.
https://github.com/llvm/llvm-project/pull/110104
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