On Mon Jan 5 00:05:09 2026 +0500, Mahad Ibrahim wrote:
> Existing comments in mmu_public.h used Doxygen syntax and had
> inconsistent formatting.
>
> Convert the function documentation to the standard kernel-doc format to
> adhere to the Linux kernel coding style.
>
> Signed-off-by: Mahad Ibrahim <[email protected]>
> Signed-off-by: Sakari Ailus <[email protected]>
Patch committed.
Thanks,
Sakari Ailus
.../pci/hive_isp_css_include/host/mmu_public.h | 59 ++++++++++------------
1 file changed, 27 insertions(+), 32 deletions(-)
---
diff --git
a/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
index 611755e88e9f..b321f4101193 100644
--- a/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
+++ b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
@@ -11,49 +11,45 @@
#include "device_access.h"
#include "assert_support.h"
-/*
- *! Set the page table base index of MMU[ID]
- *
- *\param ID[in] MMU identifier
- *\param base_index[in] page table base index
+/**
+ * mmu_set_page_table_base_index() - Set the page table base index of MMU[ID]
+ * @ID: MMU identifier
+ * @base_index: page table base index
*
- *\return none, MMU[ID].page_table_base_index = base_index
+ * Return: none, MMU[ID].page_table_base_index = base_index
*/
void mmu_set_page_table_base_index(const mmu_ID_t ID, const hrt_data
base_index);
-/*
- *! Get the page table base index of MMU[ID]
+/**
+ * mmu_get_page_table_base_index() - Get the page table base index of MMU[ID]
+ * @ID: MMU identifier
*
- *\param ID[in] MMU identifier
- *
- *\return MMU[ID].page_table_base_index
+ * Return: MMU[ID].page_table_base_index
*/
hrt_data mmu_get_page_table_base_index(const mmu_ID_t ID);
-/*
- *! Invalidate the page table cache of MMU[ID]
- *
- *\param ID[in] MMU identifier
+/**
+ * mmu_invalidate_cache() - nvalidate the page table cache of MMU[ID]
+ * @ID: MMU identifier
*
- *\return none
+ * Return: none
*/
void mmu_invalidate_cache(const mmu_ID_t ID);
-/*
- *! Invalidate the page table cache of all MMUs
+/**
+ * mmu_invalidate_cache_all() - Invalidate the page table cache of all MMUs
*
- *\return none
+ * Return: none
*/
void mmu_invalidate_cache_all(void);
-/*
- *! Write to a control register of MMU[ID]
- *
- *\param ID[in] MMU identifier
- *\param reg[in] register index
- *\param value[in] The data to be written
+/**
+ * mmu_reg_store() - Write to a control register of MMU[ID]
+ * @ID: MMU identifier
+ * @reg: register index
+ * @value: The data to be written
*
- *\return none, MMU[ID].ctrl[reg] = value
+ * Return: none, MMU[ID].ctrl[reg] = value
*/
static inline void mmu_reg_store(const mmu_ID_t ID, const unsigned int reg,
const hrt_data value)
{
@@ -62,13 +58,12 @@ static inline void mmu_reg_store(const mmu_ID_t ID, const
unsigned int reg, cons
ia_css_device_store_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data),
value);
}
-/*
- *! Read from a control register of MMU[ID]
- *
- *\param ID[in] MMU identifier
- *\param reg[in] register index
+/**
+ * mmu_reg_load() - Read from a control register of MMU[ID]
+ * @ID: MMU identifier
+ * @reg: register index
*
- *\return MMU[ID].ctrl[reg]
+ * Return: MMU[ID].ctrl[reg]
*/
static inline hrt_data mmu_reg_load(const mmu_ID_t ID, const unsigned int reg)
{
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