On Tue Mar 24 01:31:40 2026 +0800, Lian Xiangyu wrote:
> The ipu7 driver's TODO specifies that the 'U' suffix should be
> removed from hexadecimal values in register definitions.
>
> This patch cleans up the definitions in the header files within the
> ipu7 directory to comply with the requirements and improve consistency.
>
> The modification was verified by comparing the disassembly of the
> built-in.a archive before and after the change. The MD5 hashes of the
> disassembly output remained identical, confirming that this is a
> purely cosmetic cleanup with no functional impact on the binary.
>
> Signed-off-by: Lian Xiangyu <[email protected]>
> Signed-off-by: Sakari Ailus <[email protected]>
Patch committed.
Thanks,
Sakari Ailus
drivers/staging/media/ipu7/abi/ipu7_fw_boot_abi.h | 78 +++++++++++-----------
.../staging/media/ipu7/abi/ipu7_fw_common_abi.h | 4 +-
drivers/staging/media/ipu7/abi/ipu7_fw_msg_abi.h | 12 ++--
drivers/staging/media/ipu7/ipu7-buttress-regs.h | 10 +--
4 files changed, 52 insertions(+), 52 deletions(-)
---
diff --git a/drivers/staging/media/ipu7/abi/ipu7_fw_boot_abi.h
b/drivers/staging/media/ipu7/abi/ipu7_fw_boot_abi.h
index a1519c4fe661..56b90aab83ea 100644
--- a/drivers/staging/media/ipu7/abi/ipu7_fw_boot_abi.h
+++ b/drivers/staging/media/ipu7/abi/ipu7_fw_boot_abi.h
@@ -42,7 +42,7 @@ struct ia_gofo_logger_config {
((IA_GOFO_BUTTRESS_FW_BOOT_PARAMS_IS_OFFSET) + \
(u32)(IA_GOFO_BUTTRESS_FW_BOOT_PARAMS_MAX_REG_IDX_PER_APP))
#define IA_GOFO_BUTTRESS_FW_BOOT_PARAMS_PRIMARY_OFFSET (0U)
-#define IA_GOFO_CCG_IPU_BUTTRESS_FW_BOOT_PARAMS_SECONDARY_OFFSET (0x3000U / 4U)
+#define IA_GOFO_CCG_IPU_BUTTRESS_FW_BOOT_PARAMS_SECONDARY_OFFSET (0x3000 / 4U)
#define IA_GOFO_HKR_IPU_BUTTRESS_FW_BOOT_PARAMS_SECONDARY_OFFSET \
(IA_GOFO_BUTTRESS_FW_BOOT_PARAMS_MAX_REG_IDX_PER_APP * 2U)
#define IA_GOFO_HKR_HIF_BUTTRESS_FW_BOOT_PARAMS_SECONDARY_OFFSET \
@@ -75,7 +75,7 @@ enum ia_gofo_boot_uc_tile_frequency_units {
};
#define IA_GOFO_FW_BOOT_STATE_IS_CRITICAL(boot_state) \
- (0xdead0000U == ((boot_state) & 0xffff0000U))
+ (0xdead0000 == ((boot_state) & 0xffff0000))
struct ia_gofo_boot_config {
u32 length;
@@ -104,35 +104,35 @@ struct ia_gofo_secondary_boot_config {
#pragma pack(pop)
-#define IA_GOFO_WDT_TIMEOUT_ERR 0xdead0401U
-#define IA_GOFO_MEM_FATAL_DME_ERR 0xdead0801U
-#define IA_GOFO_MEM_UNCORRECTABLE_LOCAL_ERR 0xdead0802U
-#define IA_GOFO_MEM_UNCORRECTABLE_DIRTY_ERR 0xdead0803U
-#define IA_GOFO_MEM_UNCORRECTABLE_DTAG_ERR 0xdead0804U
-#define IA_GOFO_MEM_UNCORRECTABLE_CACHE_ERR 0xdead0805U
-#define IA_GOFO_DOUBLE_EXCEPTION_ERR 0xdead0806U
-#define IA_GOFO_BIST_DMEM_FAULT_DETECTION_ERR 0xdead1000U
-#define IA_GOFO_BIST_DATA_INTEGRITY_FAILURE 0xdead1010U
+#define IA_GOFO_WDT_TIMEOUT_ERR 0xdead0401
+#define IA_GOFO_MEM_FATAL_DME_ERR 0xdead0801
+#define IA_GOFO_MEM_UNCORRECTABLE_LOCAL_ERR 0xdead0802
+#define IA_GOFO_MEM_UNCORRECTABLE_DIRTY_ERR 0xdead0803
+#define IA_GOFO_MEM_UNCORRECTABLE_DTAG_ERR 0xdead0804
+#define IA_GOFO_MEM_UNCORRECTABLE_CACHE_ERR 0xdead0805
+#define IA_GOFO_DOUBLE_EXCEPTION_ERR 0xdead0806
+#define IA_GOFO_BIST_DMEM_FAULT_DETECTION_ERR 0xdead1000
+#define IA_GOFO_BIST_DATA_INTEGRITY_FAILURE 0xdead1010
enum ia_gofo_boot_state {
- IA_GOFO_FW_BOOT_STATE_SECONDARY_BOOT_CONFIG_READY = 0x57a7b000U,
- IA_GOFO_FW_BOOT_STATE_UNINIT = 0x57a7e000U,
- IA_GOFO_FW_BOOT_STATE_STARTING_0 = 0x57a7d000U,
- IA_GOFO_FW_BOOT_STATE_CACHE_INIT_DONE = 0x57a7d010U,
- IA_GOFO_FW_BOOT_STATE_MEM_INIT_DONE = 0x57a7d020U,
- IA_GOFO_FW_BOOT_STATE_STACK_INIT_DONE = 0x57a7d030U,
- IA_GOFO_FW_BOOT_STATE_EARLY_BOOT_DONE = 0x57a7d100U,
- IA_GOFO_FW_BOOT_STATE_BOOT_CONFIG_START = 0x57a7d200U,
- IA_GOFO_FW_BOOT_STATE_QUEUE_INIT_DONE = 0x57a7d300U,
- IA_GOFO_FW_BOOT_STATE_READY = 0x57a7e100U,
- IA_GOFO_FW_BOOT_STATE_CRIT_UNSPECIFIED = 0xdead0001U,
- IA_GOFO_FW_BOOT_STATE_CRIT_CFG_PTR = 0xdead0101U,
- IA_GOFO_FW_BOOT_STATE_CRIT_CFG_VERSION = 0xdead0201U,
- IA_GOFO_FW_BOOT_STATE_CRIT_MSG_VERSION = 0xdead0301U,
+ IA_GOFO_FW_BOOT_STATE_SECONDARY_BOOT_CONFIG_READY = 0x57a7b000,
+ IA_GOFO_FW_BOOT_STATE_UNINIT = 0x57a7e000,
+ IA_GOFO_FW_BOOT_STATE_STARTING_0 = 0x57a7d000,
+ IA_GOFO_FW_BOOT_STATE_CACHE_INIT_DONE = 0x57a7d010,
+ IA_GOFO_FW_BOOT_STATE_MEM_INIT_DONE = 0x57a7d020,
+ IA_GOFO_FW_BOOT_STATE_STACK_INIT_DONE = 0x57a7d030,
+ IA_GOFO_FW_BOOT_STATE_EARLY_BOOT_DONE = 0x57a7d100,
+ IA_GOFO_FW_BOOT_STATE_BOOT_CONFIG_START = 0x57a7d200,
+ IA_GOFO_FW_BOOT_STATE_QUEUE_INIT_DONE = 0x57a7d300,
+ IA_GOFO_FW_BOOT_STATE_READY = 0x57a7e100,
+ IA_GOFO_FW_BOOT_STATE_CRIT_UNSPECIFIED = 0xdead0001,
+ IA_GOFO_FW_BOOT_STATE_CRIT_CFG_PTR = 0xdead0101,
+ IA_GOFO_FW_BOOT_STATE_CRIT_CFG_VERSION = 0xdead0201,
+ IA_GOFO_FW_BOOT_STATE_CRIT_MSG_VERSION = 0xdead0301,
IA_GOFO_FW_BOOT_STATE_CRIT_WDT_TIMEOUT = IA_GOFO_WDT_TIMEOUT_ERR,
- IA_GOFO_FW_BOOT_STATE_WRONG_DATA_SECTION_UNPACKING = 0xdead0501U,
- IA_GOFO_FW_BOOT_STATE_WRONG_RO_DATA_SECTION_UNPACKING = 0xdead0601U,
- IA_GOFO_FW_BOOT_STATE_INVALID_UNTRUSTED_ADDR_MIN = 0xdead0701U,
+ IA_GOFO_FW_BOOT_STATE_WRONG_DATA_SECTION_UNPACKING = 0xdead0501,
+ IA_GOFO_FW_BOOT_STATE_WRONG_RO_DATA_SECTION_UNPACKING = 0xdead0601,
+ IA_GOFO_FW_BOOT_STATE_INVALID_UNTRUSTED_ADDR_MIN = 0xdead0701,
IA_GOFO_FW_BOOT_STATE_CRIT_MEM_FATAL_DME = IA_GOFO_MEM_FATAL_DME_ERR,
IA_GOFO_FW_BOOT_STATE_CRIT_MEM_UNCORRECTABLE_LOCAL =
IA_GOFO_MEM_UNCORRECTABLE_LOCAL_ERR,
@@ -146,18 +146,18 @@ enum ia_gofo_boot_state {
IA_GOFO_DOUBLE_EXCEPTION_ERR,
IA_GOFO_FW_BOOT_STATE_CRIT_BIST_DMEM_FAULT_DETECTION_ERR =
IA_GOFO_BIST_DMEM_FAULT_DETECTION_ERR,
- IA_GOFO_FW_BOOT_STATE_CRIT_DATA_INTEGRITY_FAILURE = 0xdead1010U,
- IA_GOFO_FW_BOOT_STATE_CRIT_STACK_CHK_FAILURE = 0xdead1011U,
+ IA_GOFO_FW_BOOT_STATE_CRIT_DATA_INTEGRITY_FAILURE = 0xdead1010,
+ IA_GOFO_FW_BOOT_STATE_CRIT_STACK_CHK_FAILURE = 0xdead1011,
IA_GOFO_FW_BOOT_STATE_CRIT_SYSCOM_CONTEXT_INTEGRITY_FAILURE =
- 0xdead1012U,
- IA_GOFO_FW_BOOT_STATE_CRIT_MPU_CONFIG_FAILURE = 0xdead1013U,
- IA_GOFO_FW_BOOT_STATE_CRIT_SHARED_BUFFER_FAILURE = 0xdead1014U,
- IA_GOFO_FW_BOOT_STATE_CRIT_CMEM_FAILURE = 0xdead1015U,
- IA_GOFO_FW_BOOT_STATE_SHUTDOWN_CMD = 0x57a7f001U,
- IA_GOFO_FW_BOOT_STATE_SHUTDOWN_START = 0x57a7e200U,
- IA_GOFO_FW_BOOT_STATE_INACTIVE = 0x57a7e300U,
- IA_GOFO_FW_BOOT_HW_CMD_ACK_TIMEOUT = 0x57a7e400U,
- IA_GOFO_FW_BOOT_SYSTEM_CYCLES_ERROR = 0x57a7e500U
+ 0xdead1012,
+ IA_GOFO_FW_BOOT_STATE_CRIT_MPU_CONFIG_FAILURE = 0xdead1013,
+ IA_GOFO_FW_BOOT_STATE_CRIT_SHARED_BUFFER_FAILURE = 0xdead1014,
+ IA_GOFO_FW_BOOT_STATE_CRIT_CMEM_FAILURE = 0xdead1015,
+ IA_GOFO_FW_BOOT_STATE_SHUTDOWN_CMD = 0x57a7f001,
+ IA_GOFO_FW_BOOT_STATE_SHUTDOWN_START = 0x57a7e200,
+ IA_GOFO_FW_BOOT_STATE_INACTIVE = 0x57a7e300,
+ IA_GOFO_FW_BOOT_HW_CMD_ACK_TIMEOUT = 0x57a7e400,
+ IA_GOFO_FW_BOOT_SYSTEM_CYCLES_ERROR = 0x57a7e500
};
#endif
diff --git a/drivers/staging/media/ipu7/abi/ipu7_fw_common_abi.h
b/drivers/staging/media/ipu7/abi/ipu7_fw_common_abi.h
index 7bb6fac585a3..398a13350480 100644
--- a/drivers/staging/media/ipu7/abi/ipu7_fw_common_abi.h
+++ b/drivers/staging/media/ipu7/abi/ipu7_fw_common_abi.h
@@ -60,7 +60,7 @@ struct ia_gofo_tlv_list {
#define IA_GOFO_MSG_ERR_MAX_DETAILS (4U)
#define IA_GOFO_MSG_ERR_OK (0U)
-#define IA_GOFO_MSG_ERR_UNSPECIFED (0xffffffffU)
+#define IA_GOFO_MSG_ERR_UNSPECIFED (0xffffffff)
#define IA_GOFO_MSG_ERR_GROUP_UNSPECIFIED (0U)
#define IA_GOFO_MSG_ERR_IS_OK(err) (IA_GOFO_MSG_ERR_OK == (err).err_code)
@@ -145,7 +145,7 @@ struct ia_gofo_msg_indirect {
#define IA_GOFO_MSG_LOG_DOC_FMT_ID_MIN (0U)
#define IA_GOFO_MSG_LOG_DOC_FMT_ID_MAX (4095U)
-#define IA_GOFO_MSG_LOG_FMT_ID_INVALID (0xfffffffU)
+#define IA_GOFO_MSG_LOG_FMT_ID_INVALID (0xfffffff)
struct ia_gofo_msg_log_info {
u16 log_counter;
diff --git a/drivers/staging/media/ipu7/abi/ipu7_fw_msg_abi.h
b/drivers/staging/media/ipu7/abi/ipu7_fw_msg_abi.h
index 8a78dd0936df..311248385993 100644
--- a/drivers/staging/media/ipu7/abi/ipu7_fw_msg_abi.h
+++ b/drivers/staging/media/ipu7/abi/ipu7_fw_msg_abi.h
@@ -69,11 +69,11 @@ struct ipu7_msg_cb_profile {
#define IPU_MSG_NODE_MAX_PROFILES (2U)
#define IPU_MSG_NODE_DEF_PROFILE_IDX (0U)
-#define IPU_MSG_NODE_RSRC_ID_EXT_IP (0xffU)
+#define IPU_MSG_NODE_RSRC_ID_EXT_IP (0xff)
-#define IPU_MSG_NODE_DONT_CARE_TEB_HI (0xffffffffU)
-#define IPU_MSG_NODE_DONT_CARE_TEB_LO (0xffffffffU)
-#define IPU_MSG_NODE_RSRC_ID_IS (0xfeU)
+#define IPU_MSG_NODE_DONT_CARE_TEB_HI (0xffffffff)
+#define IPU_MSG_NODE_DONT_CARE_TEB_LO (0xffffffff)
+#define IPU_MSG_NODE_RSRC_ID_IS (0xfe)
struct ipu7_msg_node {
struct ia_gofo_tlv_header tlv_header;
@@ -160,7 +160,7 @@ struct ipu7_msg_link_ep_pair {
#define IPU_MSG_LINK_FOREIGN_KEY_MAX (64U)
#define IPU_MSG_LINK_PBK_ID_DONT_CARE (255U)
#define IPU_MSG_LINK_PBK_SLOT_ID_DONT_CARE (255U)
-#define IPU_MSG_LINK_TERM_ID_DONT_CARE (0xffU)
+#define IPU_MSG_LINK_TERM_ID_DONT_CARE (0xff)
struct ipu7_msg_link {
struct ia_gofo_tlv_header tlv_header;
@@ -333,7 +333,7 @@ enum ipu7_msg_err_device {
#pragma pack(pop)
#pragma pack(push, 1)
-#define IPU_MSG_GRAPH_ID_UNKNOWN (0xffU)
+#define IPU_MSG_GRAPH_ID_UNKNOWN (0xff)
#define IPU_MSG_GRAPH_SEND_MSG_ENABLED 1U
#define IPU_MSG_GRAPH_SEND_MSG_DISABLED 0U
diff --git a/drivers/staging/media/ipu7/ipu7-buttress-regs.h
b/drivers/staging/media/ipu7/ipu7-buttress-regs.h
index 3eafd6a3813d..7b646aa538cf 100644
--- a/drivers/staging/media/ipu7/ipu7-buttress-regs.h
+++ b/drivers/staging/media/ipu7/ipu7-buttress-regs.h
@@ -287,7 +287,7 @@
#define BUTTRESS_TSC_CMD_START_TSC_SYNC BIT(0)
#define BUTTRESS_PWR_STATUS_HH_STATUS_SHIFT 11
-#define BUTTRESS_PWR_STATUS_HH_STATUS_MASK (0x3U << 11)
+#define BUTTRESS_PWR_STATUS_HH_STATUS_MASK (0x3 << 11)
#define BUTTRESS_TSW_WA_SOFT_RESET BIT(8)
/* new for PTL */
#define BUTTRESS_SEL_PB_TIMESTAMP BIT(9)
@@ -326,8 +326,8 @@
#define BUTTRESS_CSE2IUDATA0_IPC_NACK_MASK 0xffff
/* IS/PS freq control */
-#define BUTTRESS_IS_FREQ_CTL_RATIO_MASK 0xffU
-#define BUTTRESS_PS_FREQ_CTL_RATIO_MASK 0xffU
+#define BUTTRESS_IS_FREQ_CTL_RATIO_MASK 0xff
+#define BUTTRESS_PS_FREQ_CTL_RATIO_MASK 0xff
#define IPU7_IS_FREQ_MAX 450
#define IPU7_IS_FREQ_MIN 50
@@ -350,11 +350,11 @@
/* buttree power status */
#define IPU_BUTTRESS_PWR_STATE_IS_PWR_SHIFT 0
#define IPU_BUTTRESS_PWR_STATE_IS_PWR_MASK \
- (0x3U << IPU_BUTTRESS_PWR_STATE_IS_PWR_SHIFT)
+ (0x3 << IPU_BUTTRESS_PWR_STATE_IS_PWR_SHIFT)
#define IPU_BUTTRESS_PWR_STATE_PS_PWR_SHIFT 4
#define IPU_BUTTRESS_PWR_STATE_PS_PWR_MASK \
- (0x3U << IPU_BUTTRESS_PWR_STATE_PS_PWR_SHIFT)
+ (0x3 << IPU_BUTTRESS_PWR_STATE_PS_PWR_SHIFT)
#define IPU_BUTTRESS_PWR_STATE_DN_DONE 0x0
#define IPU_BUTTRESS_PWR_STATE_UP_PROCESS 0x1
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