Michael Galea wrote:
Hi All,
I'm building a dts for a custom 8360 based board. I'm looking at
the mpc8360_mds and mpc8360_rdk dts files, trying to figure out how the
UCCs (and all peripherals in general) got the values of their
"interrupts" properties chosen.
As someone else pointed out, you get the values from the manual. The
second cell of the IPIC interrupt specifier is the level/sense
information (8 == level triggered, active low, 2 == rising edge).
And is there any relationship between
the choice of interrupts for ucc1 and the qeic controller..
No. All QE interrupts are multiplexed over either IPIC 32 or IPIC 33.
UCC0 and UCC1 just happen to be QEIC 32 and QEIC 33, respectively.
-Scott
_______________________________________________
Linuxppc-embedded mailing list
[email protected]
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
