You should be able to contact your Xilinx sales rep for details on Virtex-5 FX as well as roadmap information. The Virtex-5 FXT product is coming soon and should be announced within the next month or so. I can't provide details, but your technical sales contact should be able to give you more info on timelines etc...
As for EDK releases, Xilinx typically releases two per year (e.g., EDK 9.1 and 9.2 were both released in 2007). EDK 10.1 is scheduled for release before summer, and should be the only release in 2008 (with some service packs throughout the year). There shouldn't be any major differences from EDK 9.2.02 regarding IP/drivers. -Rick ________________________________ From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Mohammad Sadegh Sadri Sent: Monday, March 17, 2008 3:04 AM To: Stephen Neuendorffer; Koss, Mike(Mission Systems); [email protected] Subject: RE: Compile time error, compiling Xilinx Linux 2.6 for XPS LLTEMAC Ok, thanks for guidance, by the way it is interesting for me to hear about EDK 10.1 from u steve, EDK 9.2 has been around just for a little time and you are going to 10.1? What about future plan of xilinx about Virtex-5 FX? does this tool consider that? the future plan is really important for our development team. let me give a simple example, our dev team worked on the design of our system based on PLB and OPB buses for some thing near 6 month, just then EDK 9.2.02 released and suddenly we forced to change all of the designs and to define new activities specially focusing on MPMC. we did never consider MPMC before, but the release of EDK 9.2 changed every thing. Now, that would be nice, if we can know your future plan a little, that would help us to generate correct and real gant charts. and to assign human resources correctly. this is also true for the project budget. We know that Virtex-5 devices are really capable of doing better things than Virtex-4, specially the PCI express option is great and very usable for us, but we have not moved to virtex-5 yet, because there is no FX series or at least we do not know your plan about it. Our managers we seriously asking us if we have to move to Virtex-5 soon, we did not have any reasonable answer for them because we do not have any info from u at all. thanks ________________________________ Subject: RE: Compile time error, compiling Xilinx Linux 2.6 for XPS LLTEMAC Date: Sun, 16 Mar 2008 14:43:33 -0700 From: [EMAIL PROTECTED] To: [EMAIL PROTECTED]; [EMAIL PROTECTED]; [email protected] Ah, thanks mike... you knocked the answer loose out of my brain... In EDK 9.2., the ll_temac generates either SDMA or FIFO defines, as necessary. The platform data structure contains entries for both, with the correct ones being ignored. In order to get the code to compile, there are some defines in xparameters.h which have: #ifndef XPAR_LLTEMAC_0_LLINK_CONNECTED_FIFO_INTR #define XPAR_LLTEMAC_0_LLINK_CONNECTED_FIFO_INTR 0xdeadbeef #endif #ifndef XPAR_LLTEMAC_0_LLINK_CONNECTED_DMATX_INTR #define XPAR_LLTEMAC_0_LLINK_CONNECTED_DMATX_INTR 0xdeadbeef #endif #ifndef XPAR_LLTEMAC_0_LLINK_CONNECTED_DMARX_INTR #define XPAR_LLTEMAC_0_LLINK_CONNECTED_DMARX_INTR 0xdeadbeef #endif after including xparameter_ml403.h I'm guessing maybe you overwrote the xparameters.h file and got rid of these redefines? You can define it to be whatever you want, since the value will be ignored if you are using SDMA. In EDK 10.1, the BSP generator will always generate all the defines (even ones which are not sensible in the current configuration), which avoids the above annoyances. Steve -----Original Message----- From: [EMAIL PROTECTED] on behalf of Koss, Mike (Mission Systems) Sent: Sat 3/15/2008 9:12 PM To: Mohammad Sadegh Sadri; [email protected] Subject: RE: Compile time error, compiling Xilinx Linux 2.6 for XPS LLTEMAC That interrupt is defined if you build a xps_ll_temac with the xps_ll_fifo interface. Since you already stated that you're using the mpmc, I'm going to assume that you have it connected to a SDMA controller on the mpmc. As such the driver should be looking for that definition, and not the FIFO interrupt. I don't have your version of the virtex_devices.c to have a reference as to how the platform device is being defined, so hopefully either Stephen N can chime in w/ more information, or point me to the version of the virtex_devices.c that you're using and I can try to provide some more assistance. -- Mike ________________________________ From: Mohammad Sadegh Sadri [mailto:[EMAIL PROTECTED] Sent: Saturday, March 15, 2008 4:31 AM To: [email protected] Subject: Compile time error, compiling Xilinx Linux 2.6 for XPS LLTEMAC All, that should be a small problem, and i think that its solution should be simple, I generate a base system using EDK 9.2.02 , the base system contains XPS_LL_TEMAC , MPMC and other components, I generate the software libraries and copy xparameters file into proper kernel folder. I configure that kernel and add kernel support for XPS_LL_TEMAC. while doing make I encounter this error: arch/ppc/syslib/virtex_devices.c:455: error: 'XPAR_LLTEMAC_0_LLINK_CONNECTED_FIFO_INTR' undeclared here (not in a function) I think that this definition should be available in xparameters_ml403.h file but i see that there is no such definition. I added a dummy definition for myself there to complete kernel compilation, don't know the correct value for it of course. thanks ________________________________ Access your files from anywhere with Windows Live SkyDrive! Sign up now and get 5GB of space FREE! <http://g.msn.ca/ca55/209> ________________________________ Is your lingo strong enough to ace these new word puzzles from Live Search Games? Click here to test your vocab! <http://g.msn.ca/ca55/214>
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