Have you solved your problem?? I'm having the *EXACT* same problem on a Virtex4FX60. The device is configured with PLBv46/MPMC3/LL_TEMAC.
I'm under the suspicion that the PLB is issuing an error when switching to virtual mode and that there is either a timing/synthesis error or a fundamental error with the way the FPGA is getting synthesized with the PLB. RJW. On Wed, 2008-02-13 at 12:02 -0700, David Baird wrote: > On Feb 13, 2008 11:49 AM, Ricardo Ayres Severo <[EMAIL PROTECTED]> wrote: > > Executing without single step the exception doesn't occurs. But at > > __log_buf I get only trash, even after reseting the processor. > > How can I send some characters to uartlite on asm code? > > Great. This confirms that I am not crazy. You are having similar > results as I did. But I still don't yet know why single-step and > memory read can't be used in virtual mode... > _______________________________________________ Linuxppc-embedded mailing list [email protected] https://ozlabs.org/mailman/listinfo/linuxppc-embedded
