> > PCI is actually endian-agnostic, so we're really 'fixing' the > Freescale PCI implementation with endian swapping. >
Hi Mark, Its not agnostic, its little-endian. The configuration space layout of parameters larger than a byte are defined in little endian format. The wiring on the PCI bus is little-endian, and 32-bit quantities on the bus are represented by a logic analyzer in little endian format. But once you start talking about BAR regions, then yeah, they're your bytes, do with them what you will. My hardware uses a little-endian TI DSP, and an x86 host, so I had been using compatible machines. But the PLX PCI-9054 PCI chipset exposes BAR[0] and BAR[1] as control registers that are little-endian format. Conversely, we also use some Janz CAN cards, and their messaging protocol over PCI uses big-endian format structures in their protocol. Dave
