On Jun 25, 2005, at 11:11 AM, Marcelo Tosatti wrote:

>               if (!PageReserved(page)
>                   && !test_bit(PG_arch_1, &page->flags)) {
>                       if (vma->vm_mm == current->active_mm)
> +#ifdef CONFIG_8xx
> +/* On 8xx, cache control instructions (particularly "dcbst" from
> + * flush_dcache_icache) fault as write operation if there is an
> + * unpopulated TLB entry for the address in question. To workaround
> + * that, we invalidate the TLB here, thus avoiding dcbst misbehaviour.
> + */
> +                     _tlbie(address);
> +#endif
>                               __flush_dcache_icache((void *) address);
>                       else
>                               flush_dcache_icache_page(page);

You need some { } and proper indenting here :-)

Thanks.


        -- Dan


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