On Fri, 10 Feb 2006 atul.sabharwal at exgate.tek.com wrote: > >>I'm not that familiar with 8xx, but can't you move IMMR? > > Not much choice with IMMR as it can be 0x0 or 0x00f00000 or 0xFF000000 > Or 0xFFF00000. > > Flash is from 0xfe000000 thru 0xffffffff. Now on POR, > Processor goes to offset 0x100 on CS0. So, if IMMR is overlapping with > flash, it might not boot. > > On 870, it seems that reset value for BR0/OR0 is undefined. > Data fetch goes on CS0 and then in cpu_init_f BR0 & OR0 > Are remapped. So, I could put flash at a non-standard address like > 0xDE000000 and move IMMR to 0xFF000000. > > The problem this creates is that I can set IIP to 0 or 1. So, exception > Vector prefix can be 0 or 0xfff. Since no flash at 0xfff00000 base > Address I cannot have any exceptions in my code till the u-boot code > has relocated to RAM. Which should be acceptable as what can I do > if there is exception so early in the system. > > Unless there is a better design ?
It sounds like you should move this discussion to the u-boot list since it has very little to do with the kernel. - k
