Here is an example port to another V2PRO based board.
This patch is for information only and is NOT suitable for submission up to
mainline
---
arch/ppc/boot/simple/embed_config.c | 12 +-
arch/ppc/platforms/4xx/Kconfig | 9 +
arch/ppc/platforms/4xx/Makefile | 1
arch/ppc/platforms/4xx/memec_2vp30.c | 157 ++++++++++++++++++++
arch/ppc/platforms/4xx/memec_2vp30.h | 47 ++++++
arch/ppc/platforms/4xx/memec_2vp30_devices.c | 59 ++++++++
arch/ppc/platforms/4xx/xparameters/xparameters.h | 29 ++++
.../4xx/xparameters/xparameters_memec_2vp30.h | 100 +++++++++++++++
include/asm-ppc/ibm4xx.h | 4 +
9 files changed, 410 insertions(+), 8 deletions(-)
create mode 100644 arch/ppc/platforms/4xx/memec_2vp30.c
create mode 100644 arch/ppc/platforms/4xx/memec_2vp30.h
create mode 100644 arch/ppc/platforms/4xx/memec_2vp30_devices.c
create mode 100644 arch/ppc/platforms/4xx/xparameters/xparameters_memec_2vp30.h
5f6cd89ad6b695ac30c18dff79c9054f66979899
diff --git a/arch/ppc/boot/simple/embed_config.c
b/arch/ppc/boot/simple/embed_config.c
--- a/arch/ppc/boot/simple/embed_config.c
+++ b/arch/ppc/boot/simple/embed_config.c
@@ -745,7 +745,7 @@ embed_config(bd_t **bdp)
}
#endif /* WILLOW */
-#ifdef CONFIG_XILINX_ML300
+#ifdef CONFIG_VIRTEX_II_PRO
void
embed_config(bd_t ** bdp)
{
@@ -775,14 +775,14 @@ embed_config(bd_t ** bdp)
bd = &bdinfo;
*bdp = bd;
- bd->bi_memsize = XPAR_DDR_0_SIZE;
- bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ;
- bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ;
- bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ;
+ bd->bi_memsize = V2PRO_BI_MEMSIZE;
+ bd->bi_intfreq = V2PRO_BI_INTFREQ;
+ bd->bi_busfreq = V2PRO_BI_BUSFREQ;
+ bd->bi_pci_busfreq = V2PRO_BI_PCI_BUSFREQ;
timebase_period_ns = 1000000000 / bd->bi_tbfreq;
/* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
}
-#endif /* CONFIG_XILINX_ML300 */
+#endif /* CONFIG_VIRTEX_II_PRO */
#ifdef CONFIG_IBM_OPENBIOS
/* This could possibly work for all treeboot roms.
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
--- a/arch/ppc/platforms/4xx/Kconfig
+++ b/arch/ppc/platforms/4xx/Kconfig
@@ -67,6 +67,11 @@ config XILINX_ML300
help
This option enables support for the Xilinx ML300 evaluation board.
+config MEMEC_2VP30
+ bool "MEMEC 2VP30 Eval Board"
+ help
+ This option enables support for the MEMEC 2VP30-FF1152 eval board.
+
endchoice
choice
@@ -203,7 +208,7 @@ config 405GPR
config VIRTEX_II_PRO
bool
- depends on XILINX_ML300
+ depends on XILINX_ML300 || MEMEC_2VP30
default y
config VIRTEX_II_PRO_TLB_FIX
@@ -229,7 +234,7 @@ config STB03xxx
config EMBEDDEDBOOT
bool
- depends on EP405 || XILINX_ML300
+ depends on EP405 || XILINX_ML300 || MEMEC_2VP30
default y
config IBM_OPENBIOS
diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile
--- a/arch/ppc/platforms/4xx/Makefile
+++ b/arch/ppc/platforms/4xx/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_REDWOOD_6) += redwood6.o
obj-$(CONFIG_SYCAMORE) += sycamore.o
obj-$(CONFIG_WALNUT) += walnut.o
obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o xilinx_ml300_devices.o
+obj-$(CONFIG_MEMEC_2VP30) += memec_2vp30.o memec_2vp30_devices.o
obj-$(CONFIG_405GP) += ibm405gp.o
obj-$(CONFIG_REDWOOD_5) += ibmstb4.o
diff --git a/arch/ppc/platforms/4xx/memec_2vp30.c
b/arch/ppc/platforms/4xx/memec_2vp30.c
new file mode 100644
--- /dev/null
+++ b/arch/ppc/platforms/4xx/memec_2vp30.c
@@ -0,0 +1,157 @@
+/*
+ * arch/ppc/platforms/4xx/memec_2vp30.c
+ *
+ * MEMEC 2VP30-FF1152 evaluation board initialization
+ *
+ * Author: MontaVista Software, Inc.
+ * source at mvista.com
+ *
+ * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is licensed
+ * "as is" without any warranty of any kind, whether express or implied.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/serial_8250.h>
+#include <linux/serialP.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ppc_sys.h>
+
+#include <syslib/gen550.h>
+#include "xparameters/xparameters.h"
+
+/*
+ * As an overview of how the following functions (platform_init,
+ * memec_map_io, memec_setup_arch and memec_init_IRQ) fit into the
+ * kernel startup procedure, here's a call tree:
+ *
+ * start_here arch/ppc/kernel/head_4xx.S
+ * early_init arch/ppc/kernel/setup.c
+ * machine_init arch/ppc/kernel/setup.c
+ * platform_init this file
+ * ppc4xx_init arch/ppc/syslib/ppc4xx_setup.c
+ * parse_bootinfo
+ * find_bootinfo
+ * "setup some default ppc_md pointers"
+ * MMU_init arch/ppc/mm/init.c
+ * *ppc_md.setup_io_mappings == memec_map_io this file
+ * ppc4xx_map_io arch/ppc/syslib/ppc4xx_setup.c
+ * start_kernel init/main.c
+ * setup_arch arch/ppc/kernel/setup.c
+ * #if defined(CONFIG_KGDB)
+ * *ppc_md.kgdb_map_scc() == gen550_kgdb_map_scc
+ * #endif
+ * *ppc_md.setup_arch == memec_setup_arch this file
+ * ppc4xx_setup_arch arch/ppc/syslib/ppc4xx_setup.c
+ * ppc4xx_find_bridges
arch/ppc/syslib/ppc405_pci.c
+ * init_IRQ arch/ppc/kernel/irq.c
+ * *ppc_md.init_IRQ == memec_init_IRQ this file
+ * ppc4xx_init_IRQ arch/ppc/syslib/ppc4xx_setup.c
+ * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
+ */
+
+#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
+
+static volatile unsigned *powerdown_base =
+ (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
+
+static void
+xilinx_power_off(void)
+{
+ local_irq_disable();
+ out_be32(powerdown_base, XPAR_POWER_0_POWERDOWN_VALUE);
+ while (1) ;
+}
+#endif
+
+void __init
+memec_map_io(void)
+{
+ ppc4xx_map_io();
+
+#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
+ powerdown_base = ioremap((unsigned long) powerdown_base,
+ XPAR_POWER_0_POWERDOWN_HIGHADDR -
+ XPAR_POWER_0_POWERDOWN_BASEADDR + 1);
+#endif
+}
+
+#ifdef CONFIG_SERIAL_8250
+static void __init
+memec_early_serial_map(void)
+{
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
+ struct uart_port serial_req;
+#endif
+ struct plat_serial8250_port *pdata;
+ int i = 0;
+
+ pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(V2PRO_UART);
+ while(pdata && pdata->flags)
+ {
+ pdata->membase = ioremap(pdata->mapbase, 0x100);
+
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
+ memset(&serial_req, 0, sizeof(serial_req));
+ serial_req.mapbase = pdata->mapbase;
+ serial_req.membase = pdata->membase;
+ serial_req.irq = pdata->irq;
+ serial_req.uartclk = pdata->uartclk;
+ serial_req.regshift = pdata->regshift;
+ serial_req.iotype = pdata->iotype;
+ serial_req.flags = pdata->flags;
+ gen550_init(i, &serial_req);
+#endif
+ pdata++;
+ i++;
+ }
+}
+#endif /* CONFIG_SERIAL_8250 */
+
+void __init
+memec_setup_arch(void)
+{
+#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_KGDB)
+ memec_early_serial_map();
+#endif
+
+ ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
+
+ /* Identify the system */
+ printk(KERN_INFO "Xilinx Virtex-II Pro port\n");
+}
+
+/* Called after board_setup_irq from ppc4xx_init_IRQ(). */
+void __init
+memec_init_irq(void)
+{
+ ppc4xx_init_IRQ();
+}
+
+void __init
+platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ ppc4xx_init(r3, r4, r5, r6, r7);
+
+ identify_ppc_sys_by_id(mfspr(SPRN_PVR));
+
+ ppc_md.setup_arch = memec_setup_arch;
+ ppc_md.setup_io_mappings = memec_map_io;
+ ppc_md.init_IRQ = memec_init_irq;
+
+#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
+ ppc_md.power_off = xilinx_power_off;
+#endif
+
+#ifdef CONFIG_KGDB
+ ppc_md.early_serial_map = memec_early_serial_map;
+#endif
+}
+
diff --git a/arch/ppc/platforms/4xx/memec_2vp30.h
b/arch/ppc/platforms/4xx/memec_2vp30.h
new file mode 100644
--- /dev/null
+++ b/arch/ppc/platforms/4xx/memec_2vp30.h
@@ -0,0 +1,47 @@
+/*
+ * arch/ppc/platforms/4xx/memec_2vp30.h
+ *
+ * Include file that defines the MEMEC 2VP30-FF1152 evaluation board
+ *
+ * Author: MontaVista Software, Inc.
+ * source at mvista.com
+ *
+ * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is licensed
+ * "as is" without any warranty of any kind, whether express or implied.
+ */
+
+#ifdef __KERNEL__
+#ifndef __ASM_MEMEC_2VP30_H__
+#define __ASM_MEMEC_2VP30_H__
+
+/* MEMEC 2VP30 has a Xilinx Virtex-II Pro processor */
+#include <platforms/4xx/virtex-ii_pro.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+typedef struct board_info {
+ unsigned int bi_memsize; /* DRAM installed, in bytes */
+ unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
+ unsigned int bi_intfreq; /* Processor speed, in Hz */
+ unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
+ unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
+} bd_t;
+
+/* Some 4xx parts use a different timebase frequency from the internal clock.
+*/
+#define bi_tbfreq bi_intfreq
+
+#endif /* !__ASSEMBLY__ */
+
+/* We don't need anything mapped. Size of zero will accomplish that. */
+#define PPC4xx_ONB_IO_PADDR 0u
+#define PPC4xx_ONB_IO_VADDR 0u
+#define PPC4xx_ONB_IO_SIZE 0u
+
+#define PPC4xx_MACHINE_NAME "MEMEC 2VP30-FF1152 eval board"
+
+#endif /* __ASM_MEMEC_2VP30_H__ */
+#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/memec_2vp30_devices.c
b/arch/ppc/platforms/4xx/memec_2vp30_devices.c
new file mode 100644
--- /dev/null
+++ b/arch/ppc/platforms/4xx/memec_2vp30_devices.c
@@ -0,0 +1,59 @@
+/*
+ * arch/ppc/platforms/4xx/memec_2vp30_devices.c
+ *
+ * Virtex-II Pro Device descriptions
+ *
+ * Maintainer: Grant Likely <grant.likely at gdcanada.com>
+ *
+ * Copyright 2005 General Dynamics Canada Ltd.
+ * Copyright 2005 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/serial_8250.h>
+#include <asm/ppc_sys.h>
+#include "virtex-ii_pro.h"
+#include "xparameters/xparameters.h"
+
+struct plat_serial8250_port serial_platform_data[] = {
+ {
+ .mapbase = XPAR_RS232_BASEADDR + 0x1003,
+ .irq = XPAR_OPB_INTC_0_RS232_IP2INTC_IRPT_INTR,
+ .iotype = UPIO_MEM,
+ .uartclk = XPAR_XUARTNS550_CLOCK_HZ,
+ .flags = UPF_BOOT_AUTOCONF,
+ .regshift = 2,
+ },
+ { }, /* terminated by empty record */
+};
+
+struct platform_device ppc_sys_platform_devices[] = {
+ [V2PRO_UART] = {
+ .name = "serial8250",
+ .id = 0,
+ .dev.platform_data = serial_platform_data,
+ },
+};
+
+struct ppc_sys_spec *cur_ppc_sys_spec;
+struct ppc_sys_spec ppc_sys_specs[] = {
+ {
+ /* Only one entry, always assume the same design */
+ .ppc_sys_name = "MEMEC 2VP30-FF1152 eval board",
+ .mask = 0x00000000,
+ .value = 0x00000000,
+ .num_devices = 1,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ V2PRO_UART,
+ },
+ },
+};
+
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters.h
b/arch/ppc/platforms/4xx/xparameters/xparameters.h
--- a/arch/ppc/platforms/4xx/xparameters/xparameters.h
+++ b/arch/ppc/platforms/4xx/xparameters/xparameters.h
@@ -31,6 +31,12 @@
#if defined(CONFIG_XILINX_ML300)
#include "xparameters_ml300.h"
+ /* Setup for board information structure */
+ #define V2PRO_BI_MEMSIZE XPAR_DDR_0_SIZE
+ #define V2PRO_BI_INTFREQ XPAR_CORE_CLOCK_FREQ_HZ
+ #define V2PRO_BI_BUSFREQ XPAR_PLB_CLOCK_FREQ_HZ
+ #define V2PRO_BI_PCI_BUSFREQ XPAR_PCI_0_CLOCK_FREQ_HZ
+
/* Values for setting up interrupt controller */
#define V2PRO_XINTC_USE_DCR XPAR_XINTC_USE_DCR
#define V2PRO_INTC_BASEADDR XPAR_INTC_0_BASEADDR
@@ -45,6 +51,29 @@
.iomem_reg_shift = 2, \
.io_type = SERIAL_IO_MEM, \
},
+#elif defined(CONFIG_MEMEC_2VP30)
+ #include "xparameters_memec_2vp30.h"
+
+ /* Setup for board information structure */
+ #define V2PRO_BI_MEMSIZE (XPAR_SDRAM_8MX32_HIGHADDR+1)
+ #define V2PRO_BI_INTFREQ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
+ #define V2PRO_BI_BUSFREQ XPAR_XUARTNS550_CLOCK_HZ
+ #define V2PRO_BI_PCI_BUSFREQ 0
+
+ /* Values for setting up interrupt controller */
+ #define V2PRO_XINTC_USE_DCR XPAR_XINTC_USE_DCR
+ #define V2PRO_INTC_BASEADDR XPAR_OPB_INTC_0_BASEADDR
+ #define V2PRO_INTC_KIND_OF_INTR XPAR_OPB_INTC_0_KIND_OF_INTR
+
+ /* zImage serial port definitions */
+ #define SERIAL_PORT_DFNS { \
+ .baud_base = XPAR_XUARTNS550_CLOCK_HZ/16, \
+ .irq = XPAR_OPB_INTC_0_RS232_IP2INTC_IRPT_INTR, \
+ .flags = ASYNC_BOOT_AUTOCONF, \
+ .iomem_base = (u8 *)XPAR_RS232_BASEADDR + 0x1003, \
+ .iomem_reg_shift = 2, \
+ .io_type = SERIAL_IO_MEM, \
+ },
#else
/* Add other board xparameter includes here before the #else */
#error No *_xparameters.h file included
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters_memec_2vp30.h
b/arch/ppc/platforms/4xx/xparameters/xparameters_memec_2vp30.h
new file mode 100644
--- /dev/null
+++ b/arch/ppc/platforms/4xx/xparameters/xparameters_memec_2vp30.h
@@ -0,0 +1,100 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by libgen.
+* Version: Xilinx EDK 7.1 EDK_H.10.4
+* DO NOT EDIT.
+*
+* Copyright (c) 2005 Xilinx, Inc. All rights reserved.
+*
+* Description: Driver parameters
+*
+*******************************************************************/
+
+#define STDIN_BASEADDRESS 0x40400000
+#define STDOUT_BASEADDRESS 0x40400000
+
+/******************************************************************/
+
+#define XPAR_XUARTNS550_NUM_INSTANCES 1
+#define XPAR_XUARTNS550_CLOCK_HZ 100000000
+#define XPAR_RS232_BASEADDR 0x40400000
+#define XPAR_RS232_HIGHADDR 0x4040FFFF
+#define XPAR_RS232_DEVICE_ID 0
+
+/******************************************************************/
+
+#define XPAR_XGPIO_NUM_INSTANCES 2
+#define XPAR_LEDS_4BIT_BASEADDR 0x40020000
+#define XPAR_LEDS_4BIT_HIGHADDR 0x4002FFFF
+#define XPAR_LEDS_4BIT_DEVICE_ID 0
+#define XPAR_LEDS_4BIT_INTERRUPT_PRESENT 0
+#define XPAR_LEDS_4BIT_IS_DUAL 0
+#define XPAR_PUSH_BUTTONS_3BIT_BASEADDR 0x40000000
+#define XPAR_PUSH_BUTTONS_3BIT_HIGHADDR 0x4000FFFF
+#define XPAR_PUSH_BUTTONS_3BIT_DEVICE_ID 1
+#define XPAR_PUSH_BUTTONS_3BIT_INTERRUPT_PRESENT 1
+#define XPAR_PUSH_BUTTONS_3BIT_IS_DUAL 0
+
+/******************************************************************/
+
+#define XPAR_XSYSACE_MEM_WIDTH 16
+#define XPAR_XSYSACE_NUM_INSTANCES 1
+#define XPAR_SYSACE_COMPACTFLASH_BASEADDR 0x41800000
+#define XPAR_SYSACE_COMPACTFLASH_HIGHADDR 0x4180FFFF
+#define XPAR_SYSACE_COMPACTFLASH_DEVICE_ID 0
+#define XPAR_SYSACE_COMPACTFLASH_MEM_WIDTH 16
+
+/******************************************************************/
+
+#define XPAR_INTC_MAX_NUM_INTR_INPUTS 4
+#define XPAR_XINTC_HAS_IPR 1
+#define XPAR_XINTC_USE_DCR 0
+#define XPAR_XINTC_NUM_INSTANCES 1
+#define XPAR_OPB_INTC_0_BASEADDR 0x41200000
+#define XPAR_OPB_INTC_0_HIGHADDR 0x4120FFFF
+#define XPAR_OPB_INTC_0_DEVICE_ID 0
+#define XPAR_OPB_INTC_0_KIND_OF_INTR 0x00000000
+
+/******************************************************************/
+
+#define XPAR_INTC_SINGLE_BASEADDR 0x41200000
+#define XPAR_INTC_SINGLE_HIGHADDR 0x4120FFFF
+#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
+#define XPAR_ETHERNET_MAC_IP2INTC_IRPT_MASK 0X000001
+#define XPAR_OPB_INTC_0_ETHERNET_MAC_IP2INTC_IRPT_INTR 0
+#define XPAR_PUSH_BUTTONS_3BIT_IP2INTC_IRPT_MASK 0X000002
+#define XPAR_OPB_INTC_0_PUSH_BUTTONS_3BIT_IP2INTC_IRPT_INTR 1
+#define XPAR_SYSACE_COMPACTFLASH_SYSACE_IRQ_MASK 0X000004
+#define XPAR_OPB_INTC_0_SYSACE_COMPACTFLASH_SYSACE_IRQ_INTR 2
+#define XPAR_RS232_IP2INTC_IRPT_MASK 0X000008
+#define XPAR_OPB_INTC_0_RS232_IP2INTC_IRPT_INTR 3
+
+/******************************************************************/
+
+#define XPAR_XEMAC_NUM_INSTANCES 1
+#define XPAR_ETHERNET_MAC_BASEADDR 0x80400000
+#define XPAR_ETHERNET_MAC_HIGHADDR 0x8040FFFF
+#define XPAR_ETHERNET_MAC_DEVICE_ID 0
+#define XPAR_ETHERNET_MAC_ERR_COUNT_EXIST 1
+#define XPAR_ETHERNET_MAC_DMA_PRESENT 1
+#define XPAR_ETHERNET_MAC_MII_EXIST 1
+#define XPAR_ETHERNET_MAC_CAM_EXIST 0
+#define XPAR_ETHERNET_MAC_JUMBO_EXIST 0
+
+/******************************************************************/
+
+#define XPAR_SDRAM_8MX32_BASEADDR 0x00000000
+#define XPAR_SDRAM_8MX32_HIGHADDR 0x01FFFFFF
+
+/******************************************************************/
+
+#define XPAR_PLB_BRAM_IF_CNTLR_1_BASEADDR 0xffffc000
+#define XPAR_PLB_BRAM_IF_CNTLR_1_HIGHADDR 0xffffffff
+
+/******************************************************************/
+
+#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
+
+/******************************************************************/
+
diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h
--- a/include/asm-ppc/ibm4xx.h
+++ b/include/asm-ppc/ibm4xx.h
@@ -63,6 +63,10 @@
#include <platforms/4xx/xilinx_ml300.h>
#endif
+#if defined(CONFIG_MEMEC_2VP30)
+#include <platforms/4xx/memec_2vp30.h>
+#endif
+
#ifndef __ASSEMBLY__
#ifdef CONFIG_40x
