In the flush and invalidate bootcode on PPC4xx we were accidentally
using the wrong instruction. Use cmplw, which reads from a register
like we want.
From: Frank van Maarseveen <[EMAIL PROTECTED]>
Signed-off-by: Tom Rini <trini at kernel.crashing.org>
Index: linux-2.6/arch/ppc/boot/common/util.S
===================================================================
--- linux-2.6.orig/arch/ppc/boot/common/util.S
+++ linux-2.6/arch/ppc/boot/common/util.S
@@ -252,7 +252,7 @@ _GLOBAL(flush_instruction_cache)
1: dcbf r0,r3 # Flush the data cache
icbi r0,r3 # Invalidate the instruction cache
addi r3,r3,0x10 # Increment by one cache line
- cmplwi cr0,r3,r4 # Are we at the end yet?
+ cmplw cr0,r3,r4 # Are we at the end yet?
blt 1b # No, keep flushing and invalidating
#else
/* Enable, invalidate and then disable the L1 icache/dcache. */
--
Tom Rini
http://gate.crashing.org/~trini/
