Daris A Nevil wrote:
>>The key was to not enable the FRZ signal when setting up the timerbase;
>>apparently I was getting a spurious freeze signal which was turning off
>>my timer interrupts partway through.
If you are getting a "spurious freeze" signal, wouldn't you consider
something amiss with your hardware design or SIU/debug configuration?
If the timers are responding to a freeze condition, so is the rest
of the processor core, which isn't a good thing unless you are actively
debugging.
Please do not apply this patch, but rather find the cause of the real
problem since I prefer to freeze the timers while debugging.
-- Dan
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