> > Does this mean that the L2 cache is unusable on current > revisions of > > the chip? [That's why we would like to use this chip.] > > Yes, we found problems with current chip revisions (A & B). > Ask your IBM contact for more information. >
Can you elaborate a bit on this please ?, we are considering using this processor but would need the cache. I have had a quick look at the 2 errata docs I found on the IBM web site but must be missing the bit this relate to. Thanks. Neil ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
