On 4/24/07, Andrei Konovalov <[EMAIL PROTECTED]> wrote: > Add support for the video controller IP block included into Xilinx ML300 and > ML403 reference designs. > > Signed-off-by: Andrei Konovalov <[EMAIL PROTECTED]> > --- > > This patch relies on the "Patchset to establish sanity in Xilinx Virtex > support" by Gran Likely to have > the frame buffer device registered on the platform bus. Without this patchset > one needs to fill in > the struct platform_device and make sure platform_device_register() is called > elsewhere. > > Reviews and comments are welcome. > > Would be nice to get this driver into mainline for the 2.6.22.
Quick comment on first perusal: The driver uses the out_be32 macro directly for accessing registers, which doesn't work if the FB block is configured for DCR access (like the ML403 reference design). There will need to be a property in the platform device binding to determine how to access registers. Cheers, g. -- Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd. [EMAIL PROTECTED] (403) 399-0195 _______________________________________________ Linuxppc-embedded mailing list [email protected] https://ozlabs.org/mailman/listinfo/linuxppc-embedded
