On Mittwoch, 28. Februar 2007, Frank Prepelica wrote: > Well, actually I'm not sure. But I found some details > In the manual: > > 32x Bus DDR > SDRAM w/ ECC > > 32 MByte > 128 Mbit (8M x 16 bit) devices > 2 Micron MT46V8M16TG-6T > 4 MBytes x 4 banks x 2 devices = 32 MBytes total > 2 bit bank address at 4[BA0,BA1] > 12 bit row address at 4K [A0:A11] > 9 bit column address at 512[A0:A8] > > 64 MByte > 256 Mbit (16M x 16 bit) devices > 2 Micron MT46V16M16TG-6T > 8 MBytes x 4 banks x 2 devices = 64 MBytes total > 2 bit bank address at 4[BA0,BA1] > 13 bit row address at 8K [A0:A12] > 9 bit column address at 512[A0:A8] > > 128 MByte > 512 Mbit (32M x 16 bit) devices > 2 Micron MT46V32M16TG-6T > 16 MBytes x 4 banks x 2 devices = 128 MBytes total > 2 bit bank address at 4[BA0,BA1] > 13 bit row address at 8K [A0:A12] > 10 bit column address at 1K[A0:A9] > > > Are the details for the 64MByte corresponding to that post > from Gerhard? > > @Gerhard > Here are some parts of my configuration regarding the MTD settings. > Could you tell which I have to modify to get running the MTD partitions? [SNIPSNAP]
The stuff above describe only the available RAM configurations, not the flash. Checkout for AMD/Spansion chips (according to your earlier post)... Your config should be okay, what I meant in my previous mail was, that you should check your mapping driver regarding the bankwidth parameter. - Gerhard -- Gerhard Jaeger <[EMAIL PROTECTED]> SYSGO AG Embedded and Real-Time Software Lise-Meitner-Str. 15 D-89081 Ulm / Germany www.sysgo.com | www.elinos.com | www.pikeos.com | www.osek.de _______________________________________________ Linuxppc-embedded mailing list [email protected] https://ozlabs.org/mailman/listinfo/linuxppc-embedded
