Gents/ladies,
Has anyone successfully used the 4xx DMA interface? I think I'm missing
something very obvious, or it's broken.
We are using a Linux 2.6.14 kernel on a 440EPx. Basically, it looks like the
code is written to work with the PLB4 controller but addressed to the PLB3
controller.
The problem I have is the following: ppc4xx_dma.h has the following code
section(s):
#ifdef CONFIG_44x
#define PPC4xx_DMA_64BIT
#define DMA_CR_OFFSET 1
#else
#define DMA_CR_OFFSET 0
#endif
#define SET_DMA_PW(x) (((x)&0x3)<<(26-DMA_CR_OFFSET)) /* Peripheral
Width */
And ibm44x.h has the following:
#define DCRN_DMA0_BASE 0x100
#define DCRN_DMA2P40_BASE 0x300
#define DCRN_DMACR0 (DCRN_DMA0_BASE + 0x0) /* DMA Channel Control 0 */
A typical DMA interface function as defined in ppc4xx_dma.c, looks like this
void ppc4xx_enable_dma(unsigned int dmanr)
{
...
mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control);
...
}
Because of the processor type, DMA_CR_OFFSET is set to 1. Which means that
the control register is structured on the PLB4, not the PL3 as the
DCRN_DMASR address implies.
How (or can you) do you specify which DMA controller you want to use? Any
ideas/comments?
Cheers
Jan Reyneke
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