On 11/13/06, Dan Malek <[EMAIL PROTECTED]> wrote: > > On Nov 13, 2006, at 10:56 AM, Laurent Pinchart wrote: > > > There is, however, a problem left. The SCC controllers have a 32- > > byte FIFO > > between the buffer descriptors and the wires. cpm_uart_tx_empty() > > checks if > > all buffer descriptors have been processed, but doesn't check if > > the transmit > > FIFO is actually empty. > > There is no way to determine if the hardware FIFO is empty. > It's buried under the CPM microcode.
One might enable the RTS signal and check if it is asserted to see what the SCC is doing. Unfortunately, the signal may or may not be used depending on the board. _______________________________________________ Linuxppc-embedded mailing list [email protected] https://ozlabs.org/mailman/listinfo/linuxppc-embedded
