Hello,
On my board I have amd8111 nic + realtek 8201 PHY,
but 8111nic use active high reset signal to reset PHY
while RTL8201 accepts active low reset signal. However
amd8111 nic provides PHY_RESET_POLARITY bit in CMD3 register,
so I add the "phy_lowreset" register to handle this.
attached is the patch.
Regards,
Liu Tao
diff -Naur freebios2-20041201-1800/src/include/device/pci_ids.h freebios2-patch/src/include/device/pci_ids.h
--- freebios2-20041201-1800/src/include/device/pci_ids.h 2004-11-11 14:53:20.000000000 +0800
+++ freebios2-patch/src/include/device/pci_ids.h 2004-12-03 12:24:26.000000000 +0800
@@ -418,6 +418,7 @@
#define PCI_DEVICE_ID_AMD_8111_SMB 0x746a
#define PCI_DEVICE_ID_AMD_8111_ACPI 0x746b
+#define PCI_DEVICE_ID_AMD_8111_NIC 0x7462
#define PCI_DEVICE_ID_AMD_8111_USB2 0x7463
#define PCI_DEVICE_ID_AMD_8131_PCIX 0x7450
#define PCI_DEVICE_ID_AMD_8131_IOAPIC 0x7451
diff -Naur freebios2-20041201-1800/src/southbridge/amd/amd8111/amd8111_nic.c freebios2-patch/src/southbridge/amd/amd8111/amd8111_nic.c
--- freebios2-20041201-1800/src/southbridge/amd/amd8111/amd8111_nic.c 2004-10-21 18:44:04.000000000 +0800
+++ freebios2-patch/src/southbridge/amd/amd8111/amd8111_nic.c 2004-12-03 12:24:26.000000000 +0800
@@ -8,18 +8,44 @@
#include <device/pci_ops.h>
#include "amd8111.h"
+#define CMD3 0x54
+static void nic_init(struct device *dev)
+{
+ struct southbridge_amd_amd8111_config *conf;
+ struct resource *resource;
+ void *mmio;
+
+ conf = dev->chip_info;
+ if (conf->phy_lowreset) {
+ printk_debug("NIC: PHY active low reset\n");
+ resource = find_resource(dev, 0x10);
+ mmio = (void *)resource->base;
+ /* PHY_RST Pin Polarity */
+ *(volatile uint32_t *)(mmio + CMD3) = 0x81;
+ }
+}
+
+static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+{
+ pci_write_config32(dev, 0xc8,
+ ((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+static struct pci_operations lops_pci = {
+ .set_subsystem = lpci_set_subsystem,
+};
static struct device_operations nic_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .enable = amd8111_enable,
- .init = 0,
+ .init = nic_init,
.scan_bus = 0,
+ .enable = amd8111_enable,
+ .ops_pci = &lops_pci,
};
static struct pci_driver nic_driver __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_AMD,
- .device = 0x7462,
+ .device = PCI_DEVICE_ID_AMD_8111_NIC,
};
diff -Naur freebios2-20041201-1800/src/southbridge/amd/amd8111/chip.h freebios2-patch/src/southbridge/amd/amd8111/chip.h
--- freebios2-20041201-1800/src/southbridge/amd/amd8111/chip.h 2004-10-21 18:44:04.000000000 +0800
+++ freebios2-patch/src/southbridge/amd/amd8111/chip.h 2004-12-03 12:24:26.000000000 +0800
@@ -5,6 +5,7 @@
{
unsigned int ide0_enable : 1;
unsigned int ide1_enable : 1;
+ unsigned int phy_lowreset : 1;
};
struct chip_operations;
diff -Naur freebios2-20041201-1800/src/southbridge/amd/amd8111/Config.lb freebios2-patch/src/southbridge/amd/amd8111/Config.lb
--- freebios2-20041201-1800/src/southbridge/amd/amd8111/Config.lb 2004-11-11 14:53:23.000000000 +0800
+++ freebios2-patch/src/southbridge/amd/amd8111/Config.lb 2004-12-03 12:24:54.000000000 +0800
@@ -6,7 +6,7 @@
driver amd8111_acpi.o
#driver amd8111_usb2.o
#driver amd8111_ac97.o
-#driver amd8111_nic.o
+driver amd8111_nic.o
driver amd8111_pci.o
driver amd8111_smbus.o
object amd8111_reset.o
