On Wed, 2004-03-24 at 08:35, Stefan Reinauer wrote: > * YhLu <[EMAIL PROTECTED]> [040324 04:57]: > > It seems the soft reset didn't rest the MB and ... > > > > Ollie, > > > > Can you check that in S2885? And I think if you changed the hard_reset and > > soft_reset to bus 1, it may not rest the ht. > > I've changed the reset code today so that the same code is used on all > K8+AMD8111 systems > > reset.c went to southbridge/amd/amd8111/amd8111_reset.c > > In the config file, you can now specify the device doing the hard reset, > instead of copy+write the reset code for every new mainboard: > > default HARD_RESET_BUS=1 > default HARD_RESET_DEVICE=5 > default HARD_RESET_FUNCTION=0 >
These macros are K8 specific, should we add AMDK8 in front of it ? > It would be a lot nicer to find the device dynamically. Maybe that can > get fixed together with dynamically creating pirq and the other tables > some day.. > > The Tyan boards currently assume the 8111 reset logic is available at > following positions on the PCI bus: > > s2850 1:2.0 > s2880 1:4.0 > s2881 1:4.0 > s2882 1:4.0 > s2885 3:4.0 > s4880 1:4.0 > How do you actually determine this ? And how is this been programmed in LinuxBIOS ? Ollie _______________________________________________ Linuxbios mailing list [EMAIL PROTECTED] http://www.clustermatic.org/mailman/listinfo/linuxbios
