I am not sure this is the right place to ask this question but i am asking
anyhow since this is only active community I could find to raise this
question.
I am trying to mainline to 5.19 kernel, the tablet "Odys Rise10 Quad" which
has A33 bundled with 2*8gb H27UCG8T2BTR-BC Hynix NAND chips.
The existing script.fex shows a normal connection of the NAND controller,
nothing funny:
nand0_we = port:PC00<2><default><2><default>
nand0_ale = port:PC01<2><default><2><default>
nand0_cle = port:PC02<2><default><2><default>
nand0_nre = port:PC05<2><default><2><default>
nand0_ce1 = port:PC03<2><default><2><default>
nand0_ce0 = port:PC04<2><default><2><default>
nand0_ce2 = port:PC17<2><default><2><default>
nand0_ce3 = port:PC18<2><default><2><default>
nand0_rb0 = port:PC06<2><default><2><default>
nand0_rb1 = port:PC07<2><default><2><default>
nand0_d0 = port:PC08<2><default><2><default>
nand0_d1 = port:PC09<2><default><2><default>
nand0_d2 = port:PC10<2><default><2><default>
nand0_d3 = port:PC11<2><default><2><default>
nand0_d4 = port:PC12<2><default><2><default>
nand0_d5 = port:PC13<2><default><2><default>
nand0_d6 = port:PC14<2><default><2><default>
nand0_d7 = port:PC15<2><default><2><default>
nand0_ndqs = port:PC16<2><default><2><default>
This is inline with reference IO mapping of A33 SOC datasheet. And with
the below DTS for my tablet:
&nfc {
status = "okay";
/* 2*8Gb SKHynix H27UCG8T2BTR-BC */
nand@0 {
reg = <0>;
allwinner,rb = <0>;
nand-ecc-mode = "hw";
nand-ecc-strength = <40>;
nand-ecc-step-size = <1024>;
};
nand@1 {
reg = <1>;
allwinner,rb = <1>;
nand-ecc-mode = "hw";
nand-ecc-strength = <40>;
nand-ecc-step-size = <1024>;
};
};
Linux kernel only detects the first NAND chip, the 2nd is not detected.
[ 2.553361] nand: device found, Manufacturer ID: 0xad, Chip ID: 0xde
[ 2.559746] nand: Hynix NAND 8GiB 3,3V 8-bit
*[ 2.564039] nand: 8192 MiB, MLC, erase size: 4096 KiB, page size:
16384, OOB size: 1280*
[ 2.572170] Scanning device for bad blocks
[ 2.591988] Bad eraseblock 2 at 0x000000800000
.
8.311469] random: crng init done
.
*[ 24.389050] Bad eraseblock 2047 at 0x0001ffc00000 () (Every block
except first and last)*
[ 24.394586] mtdblock: MTD device '1c03000.nand-controller' is NAND,
please consider using UBI block devices instead.
*[ 24.407111] nand: No NAND device found*
I have noticed in sun8i-a23-a33.dtsi nand controller is only initialized
with CS0 & RB0 pins, so DTB needs to report the kernel which pins to
utilize to select chip1.
sun8i-a23-a33.dtsi:
nfc: nand-controller@1c03000 {
.
pinctrl-0 = <&nand_pins *&nand_cs0_pin &nand_rb0_pin*>;
.
};
Knowing that /master/drivers/mtd/nand/raw/sunxi_nand.c only uses <reg>
index to Chip select, and <allwinner,rb> index to detect busy, how can i
tell kernel to use PC3 to CS1 & PC7 to RB1?
Since i am a DTS noob, i tried following in my board dts to override the
dts and miserably failed:
*pinctrl-names = "chip0pins", "chip1pins"; pinctrl-0 = <&nand_pins
&nand_cs0_pin &nand_rb0_pin>;pinctrl-1 = <&nand_pins &nand_cs1_pin
&nand_rb1_pin>; *
both chips not detected
*pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin **&nand_pins
&nand_cs1_pin &nand_rb1_pin**>;*
both chips not detected
I am scratching my head about this last 3 days and i think i am quite
consfused. Any help is appreciated to this lost soul.
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