On Wed, 8 Jan 2020 12:34:48 +0100 Emmanuel Vadot <[email protected]> wrote:
Hi Emmanuel, > On Wed, 8 Jan 2020 10:10:05 +0000 > Andre Przywara <[email protected]> wrote: > > > The Allwinner H6 SoC contains two SPI controllers similar to the H3/A64, > > but with the added capability of 3-wire and 4-wire operation modes. > > For now the driver does not support those, but the SPI registers are > > fully backwards-compatible, just adding bits and registers which were > > formerly reserved. So we can use the existing driver for the "normal" SPI > > modes, for instance to access the SPI NOR flash soldered on the PineH64 > > board. > > We use an H6 specific compatible string in addition to the existing H3 > > string, so when the driver later gains Quad SPI support, it should work > > automatically without any DT changes. > > > > Tested by accessing the SPI flash on a Pine H64 board (SPI0), also > > connecting another SPI flash to the SPI1 header pins. > > > > Signed-off-by: Andre Przywara <[email protected]> > > --- > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 54 ++++++++++++++++++++ > > 1 file changed, 54 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > index 3329283e38ab..40835850893e 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > @@ -338,6 +338,30 @@ > > bias-pull-up; > > }; > > > > + /omit-if-no-ref/ > > That would prevent users to use an overlay and use those pins, is that > something that we want ? I'm not sure that the space saved by those are > useful. Me neither ;-), but Maxime asked for it before, and it doesn't really hurt. For overlays: if a .dtb is compiled with support for overlays (-@ to generate symbols), this tag is ignored, and the nodes stay in the .dtb, regardless of being referenced or not. Just confirmed by trying this. Cheers, Andre. > > Cheers, > > > + spi0_pins: spi0-pins { > > + pins = "PC0", "PC2", "PC3"; > > + function = "spi0"; > > + }; > > + > > + /omit-if-no-ref/ > > + spi0_cs_pin: spi0-cs-pin { > > + pins = "PC5"; > > + function = "spi0"; > > + }; > > + > > + /omit-if-no-ref/ > > + spi1_pins: spi1-pins { > > + pins = "PH4", "PH5", "PH6"; > > + function = "spi1"; > > + }; > > + > > + /omit-if-no-ref/ > > + spi1_cs_pin: spi1-cs-pin { > > + pins = "PH3"; > > + function = "spi1"; > > + }; > > + > > spdif_tx_pin: spdif-tx-pin { > > pins = "PH7"; > > function = "spdif"; > > @@ -504,6 +528,36 @@ > > #size-cells = <0>; > > }; > > > > + spi0: spi@5010000 { > > + compatible = "allwinner,sun50i-h6-spi", > > + "allwinner,sun8i-h3-spi"; > > + reg = <0x05010000 0x1000>; > > + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; > > + clock-names = "ahb", "mod"; > > + dmas = <&dma 22>, <&dma 22>; > > + dma-names = "rx", "tx"; > > + resets = <&ccu RST_BUS_SPI0>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + spi1: spi@5011000 { > > + compatible = "allwinner,sun50i-h6-spi", > > + "allwinner,sun8i-h3-spi"; > > + reg = <0x05011000 0x1000>; > > + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; > > + clock-names = "ahb", "mod"; > > + dmas = <&dma 23>, <&dma 23>; > > + dma-names = "rx", "tx"; > > + resets = <&ccu RST_BUS_SPI1>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > emac: ethernet@5020000 { > > compatible = "allwinner,sun50i-h6-emac", > > "allwinner,sun50i-a64-emac"; > > -- > > 2.17.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20200108114706.5f27a9b2%40donnerap.cambridge.arm.com.
