On Fri, Aug 22, 2014 at 09:23:53PM +0200, Hans de Goede wrote: > Hi Luc, > > Right, the problem is that the hdmi encoder has its own 4 divider > register bits, and those contain m not m-1, and coding 16 (so m), > rather then 15 (so m - 1) won't fit in 4 bits. The 1 million dollar > question is what a divider value of 0 will actually do in the > hdmi encoder bits, but unless you've a really clever way to figure > that out, I guess we will never no. > > So your right that 1-16 will work for the lcd controller, and thus also > for vga out (which I assume is what you used to do the testing on the > CRT), but the hdmi encoder can probably only do 1-15.
Ooh, damn, i totally missed that :) Yeah, so 16 goes out of the window. It doesn't add any actually new dotclock values anyway. Will add a big comment. Great catch! As for the hdmi bits, i still need to go figure out how i got to those 8 months ago. I am a bit all over the place atm, but that's definitely high on my todo list, and i will post a set of new patches, with your additions, when i've done that. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
