From: Vineet Gupta <vgu...@kernel.org>
The only functional change is eliding the unaligned buffer head
handling. Also cleanup macros adding argument default values.
Signed-off-by: Vineet Gupta <vgu...@kernel.org>
---
arch/arc/lib/memset-archs.S | 34 +++++++++++++++++-----------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arc/lib/memset-archs.S b/arch/arc/lib/memset-archs.S
index d0a5cec4cdca..330e22f7cf3c 100644
--- a/arch/arc/lib/memset-archs.S
+++ b/arch/arc/lib/memset-archs.S
@@ -17,43 +17,43 @@
#if L1_CACHE_SHIFT == 6
-.macro PREALLOC_INSTR reg, off
- prealloc [\reg, \off]
+.macro PREALLOCR s, off=0
+ prealloc [\s, \off]
.endm
-.macro PREFETCHW_INSTR reg, off
- prefetchw [\reg, \off]
+.macro PREFETCHWR s, off=0
+ prefetchw [\s, \off]
.endm
#else
-.macro PREALLOC_INSTR reg, off
+.macro PREALLOCR s, off=0
.endm
-.macro PREFETCHW_INSTR reg, off
+.macro PREFETCHWR s, off=0
.endm
#endif
ENTRY_CFI(memset)
+ ; return if size 0 (happens lot)
mov.f 0, r2
-;;; if size is zero
jz.d [blink]
- mov r3, r0 ; don't clobber ret val
+ mov r3, r0 ; make a copy of input pointer reg
- PREFETCHW_INSTR r0, 0 ; Prefetch the first write location
+ PREFETCHWR r0
-;;; if length < 8
- brls.d.nt r2, 8, .Lsmallchunk
- mov.f lp_count,r2
+ ; small 1-8 byte handled in tail byte loop :-)
+ brlo r2, 8, .Lbyteloop
- and.f r4, r0, 0x03
- rsub lp_count, r4, 4
- lpnz @.Laligndestination
- ;; LOOP BEGIN
+#ifndef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
+ ; handle any starting unaligned bytes (upto 3)
+ and.f lp_count, r0, 0x3
+ lpnz 1f
stb.ab r1, [r3,1]
sub r2, r2, 1
-.Laligndestination:
+1:
+#endif
;;; Destination is aligned
and r1, r1, 0xFF
--
2.25.1
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