Hi Eugeniy, > -----Original Message----- > From: Eugeniy Paltsev <eugeniy.palt...@synopsys.com> > Sent: Monday, July 22, 2019 12:32 PM > To: linux-snps-arc@lists.infradead.org; Vineet Gupta <vgu...@synopsys.com> > Cc: linux-ker...@vger.kernel.org; Alexey Brodkin <abrod...@synopsys.com>; > Eugeniy Paltsev > <eugeniy.palt...@synopsys.com> > Subject: [PATCH v2] ARC: [plat-hsdk]: allow to switch between AXI DMAC port > configurations > > We want to use DW AXI DMAC on HSDK board in our automated verification > to test cache & dma kernel code changes. This is perfect candidate > as we don't depend on any external peripherals like MMC card / USB > storage / etc. > To increase test coverage we want to test both options: > * DW AXI DMAC is connected through IOC port & dma direct ops used > * DW AXI DMAC is connected to DDR port & dma noncoherent ops used > > Introduce 'arc_hsdk_axi_dmac_coherent' global variable which can be > modified by debugger (same way as we patch 'ioc_enable') to switch > between these options without recompiling the kernel. > Depend on this value we tweak memory bridge configuration and > "dma-coherent" DTS property of DW AXI DMAC.
Looks good to me. Acked-by: Alexey Brodkin <abrod...@synopsys.com> -Thanks _______________________________________________ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
