Hi Philipp,
On 09/18/2017 05:07 AM, Philipp Zabel wrote:
On Thu, 2017-09-14 at 17:28 +0300, Eugeniy Paltsev wrote:
ARC AXS10x boards support custom IP-block which allows to control
reset signals of selected peripherals. For example DW GMAC, etc...
This block is controlled via memory-mapped register (AKA CREG) which
represents up-to 32 reset lines. This regiter is self-clearing so we
don't need to deassert line after reset.
As of today only the following lines are used:
- DW GMAC - line 5
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
Changes v1 -> v2:
* The creg reset register is self-clearing so we don't need to clear it
manually. Fixed it.
* Use reset callback instead of assert/deassert pair.
* Rename reset node in documentation to "reset-controller" for consistency
with the other bindings.
* Use devm_reset_controller_register instead of reset_controller_register
NOTE:
This driver couldn't be replaced by reset-simple driver as we mustn't
read from reset register or clear it.
Thanks, I've applied this patch to the reset/next branch.
Will it be OK for you to apply the corresponding DT update for platform - that way
I don't have to keep track of when ur branch hits mainline etc.
The chances of any ensuing conflicts are pretty rare - and easy to resolve if
at all.
If so, Eugeniy can send the patch ur way !
Thx,
-Vineet
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