On 11/22/2016 03:22 AM, Marc Zyngier wrote:
>> 2. The kernel will not call idu_irq_set_affinity() for IDU interrupt
>> > controller in some cases. It happens when the top interrupt
>> > controller does not support setting of the affinity and does not even
>> > support propagating of it (e.g. a GPIO interrupt controller on top of
>> > IDU which funnels all interrupts in one line). However
>> > idu_irq_set_affinity() must be called to unmask common interrupts in
>> > IDU. And if I want to make an affinity in irq_desc to match a real
>> > affinity I must call irq_set_affinity() instead of just
>> > idu_irq_set_affinity() .
>
> My brain has just melted. Can you describe this a bit more, possibly
> using some ASCII diagrams? I really don't understand what the affinity
> settings have to do with unmasking the interrupt... It is that you mask
> an interrupt by routing it to a dummy CPU?
The AXS SDP board has an "interesting" cascade of interrupt controllers.
Exact setup in arch/arc/boot/dts/{axc003_idu,axs10x_mb}.dtsi
/*
* Peripherals on CPU Card and Mother Board are wired to cpu intc via
* intermediate DW APB GPIO blocks (mainly for debouncing)
*
* --------------------
* | snps,archs-intc |
* --------------------
* | #24 |#25
* --------------------
* | snps,archs-intc |
* --------------------
* | #0 | #1
* ------------------- -------------------
* | snps,dw-apb-gpio | | snps,dw-apb-gpio |
* | (pass thru) | | |
* ------------------- -------------------
* | #12 |
* | [ Debug UART on cpu card ]
* |
* ------------------------
* | snps,dw-apb-intc (MB)|
* ------------------------
* | | | |
* [eth] [uart] [... other perip on Main Board]
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