Hello Sergei-san,

> From: Sergei Shtylyov, Sent: Wednesday, October 9, 2019 1:13 AM
> 
> Hello!
> 
> On 10/08/2019 01:18 PM, Yoshihiro Shimoda wrote:
> 
> > According to the R-Car Gen2/3 manual, the bit 0 of MACCTLR register
> > should be written by 0. To avoid unexpected behaviors from this
> 
>    s/by/to/. I'd also mention that this bit is set to 1 on reset.

Thank you for your review! I'll fix it.

Best regards,
Yoshihiro Shimoda

> > incorrect setting, this patch fixes it.
> >
> > Fixes: b3327f7fae66 ("PCI: rcar: Try increasing PCIe link speed to 5 GT/s 
> > at boot")
> > Cc: <[email protected]> # v4.9+
> > Signed-off-by: Yoshihiro Shimoda <[email protected]>
> 
> Reviewed-by: Sergei Shtylyov <[email protected]>
> 
> [...]
> 
> MBR, Sergei

Reply via email to