On Wed, Feb 20, 2019 at 03:48:11PM +0800, Jerry-ch Chen wrote:
> This patch adds nodes for Face Detection (FD) unit. FD is embedded
> in Mediatek SoCs and works with the co-processor to perform face
> detection on the input data and image and output detected face result.
> 
> Signed-off-by: Jerry-ch Chen <jerry-ch.c...@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi 
> b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index b3d8dfd..45c7e2f 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -440,6 +440,26 @@
>                       #clock-cells = <1>;
>               };
>  
> +             fd_smem: fd_smem {
> +                     compatible = "mediatek,fd_smem";
> +                     mediatek,larb = <&larb5>;
> +                     iommus = <&iommu M4U_PORT_CAM_IMGI>;

This doesn't look like an actual h/w device...

> +             };
> +
> +             fd:fd@1502b000 {

space after the :  ^
> +                     compatible = "mediatek,fd";

Should be SoC specific.

> +                     mediatek,larb = <&larb5>;
> +                     mediatek,vpu = <&vpu>;
> +                     iommus = <&iommu M4U_PORT_CAM_FDVT_RP>,
> +                              <&iommu M4U_PORT_CAM_FDVT_WR>,
> +                              <&iommu M4U_PORT_CAM_FDVT_RB>;
> +                     reg = <0 0x1502b000 0 0x1000>;
> +                     interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_LOW>;
> +                     clocks = <&imgsys CLK_IMG_FDVT>;
> +                     clock-names = "FD_CLK_IMG_FD";
> +                     smem_device = <&fd_smem>;
> +             };
> +
>               vdecsys: syscon@16000000 {
>                       compatible = "mediatek,mt8183-vdecsys", "syscon";
>                       reg = <0 0x16000000 0 0x1000>;
> -- 
> 1.9.1
> 

Reply via email to