Hi Yunfei Dong,
Why is this series resent? Patches 1 and 3 have been merged in our
media master tree already.
Regards,
Hans
On 2/14/19 3:24 AM, Yunfei Dong wrote:
> Fix MTK binding document for MT8173 dtsi changed in order
> to use standard CCF interface.
> MT8173 SoC from Mediatek.
>
> Signed-off-by: Yunfei Dong <[email protected]>
> Signed-off-by: Qianqian Yan <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/media/mediatek-vcodec.txt | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt
> b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt
> index 2a615d8..b6b5dde 100644
> --- a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt
> +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt
> @@ -66,6 +66,15 @@ vcodec_dec: vcodec@16000000 {
> "vencpll",
> "venc_lt_sel",
> "vdec_bus_clk_src";
> + assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
> + <&topckgen CLK_TOP_CCI400_SEL>,
> + <&topckgen CLK_TOP_VDEC_SEL>,
> + <&apmixedsys CLK_APMIXED_VCODECPLL>,
> + <&apmixedsys CLK_APMIXED_VENCPLL>;
> + assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
> + <&topckgen CLK_TOP_UNIVPLL_D2>,
> + <&topckgen CLK_TOP_VCODECPLL>;
> + assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>;
> };
>
> vcodec_enc: vcodec@18002000 {
> @@ -105,4 +114,8 @@ vcodec_dec: vcodec@16000000 {
> "venc_sel",
> "venc_lt_sel_src",
> "venc_lt_sel";
> + assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>,
> + <&topckgen CLK_TOP_VENC_LT_SEL>;
> + assigned-clock-parents = <&topckgen CLK_TOP_VENCPLL_D2>,
> + <&topckgen CLK_TOP_UNIVPLL1_D2>;
> };
>
