On Mon, Oct 06, 2014 at 08:44:35PM +0200, Arnd Bergmann wrote: > On Monday 06 October 2014 19:21:53 Matthew Garrett wrote: > > Unfortunately not. I'd assume that PM registers are expected to be > > accessed via the _PS* methods instead. Does MSI make sense outside the > > context of PCI interrupts? > > Yes, the ARM GIC has a weird sense of what MSI is used for, and > apparently some SoC vendors have started using MSI by default for > all on-chip peripherals. > > A patch series to extend MSI to platform devices is currently > under review.
Mm. Yeah, it doesn't seem like there's any ACPI-defined mechanism for MSI control. Let's chat about this next week? -- Matthew Garrett | [email protected] -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
