Changing the default 'instructions' HW event for SandyBridge and
IvyBrige to use the available precise 'instructions' event.

The precise event is defined in Intel SDM as:

INST_RETIRED.ALL - Precise instruction retired event with HW to
reduce effect of PEBS shadow in IP distribution

for both SandyBridge and IvyBrige micro-archs. It allows to use
precise modifier on 'instructions' event on SandyBridge and
IvyBrige micro-archs which is not possible now.

Signed-off-by: Jiri Olsa <[email protected]>
Cc: Arnaldo Carvalho de Melo <[email protected]>
Cc: Namhyung Kim <[email protected]>
Cc: Corey Ashford <[email protected]>
Cc: Frederic Weisbecker <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: Namhyung Kim <[email protected]>
Cc: Paul Mackerras <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Andi Kleen <[email protected]>
Cc: David Ahern <[email protected]>
Cc: Stephane Eranian <[email protected]>
---
 arch/x86/kernel/cpu/perf_event_intel.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c 
b/arch/x86/kernel/cpu/perf_event_intel.c
index 529c893..3bc3592 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -2104,6 +2104,9 @@ __init int intel_pmu_init(void)
                /* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/
                intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =
                        X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1);
+               /* INST_RETIRED.ALL to count precise instructions */
+               intel_perfmon_event_map[PERF_COUNT_HW_INSTRUCTIONS] =
+                       X86_CONFIG(.event=0xc0, .umask=0x01);
 
                pr_cont("SandyBridge events, ");
                break;
@@ -2127,6 +2130,9 @@ __init int intel_pmu_init(void)
                /* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
                intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
                        X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1);
+               /* INST_RETIRED.ALL to count precise instructions */
+               intel_perfmon_event_map[PERF_COUNT_HW_INSTRUCTIONS] =
+                       X86_CONFIG(.event=0xc0, .umask=0x01);
 
                pr_cont("IvyBridge events, ");
                break;
-- 
1.7.11.7

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