On Thursday 16 August 2012, Will Deacon wrote:
> > > +
> > > +#include <linux/kernel.h>
> > > +#include <linux/spinlock.h>
> > > +#include <linux/atomic.h>
> > > +
> > > +#ifdef CONFIG_SMP
> > > +arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned = {
> > > + [0 ... (ATOMIC_HASH_SIZE-1)] = __ARCH_SPIN_LOCK_UNLOCKED
> > > +};
> > > +#endif
> >
> > What?
> >
> > I suppose this is a leftover from an earlier version using the
> > generic bitops, right?
>
> We currently use the generic atomic bitops (asm-generic/bitops/atomic.h)
> which contains:
>
> # define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long)
> a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
>
> so we have to provide a definition for the array. We have additional patches
> containing optimised assembly implementations of the atomic bitops which we
> will push later, once we've got some hardware to benchmark with.
>
Ah, I was confusing this with the asm/atomic.h stuff, for which you already
provide an optimized version.
The generic atomic bitops are really horrible in performance and I would
expect that there is just one obvious way to implement bitops using ldaxr/stlxr,
so I recommend just doing that even if you have no hardware for benchmarking.
The s390 version should be fairly easy to adapt.
Arnd
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