On Tue, Jul 14, 2026 at 09:06:54PM +0800, Zhanpeng Zhang wrote: > Program RCID and MCID for RISC-V IOMMU groups through the device context > TA fields. The resctrl group assignment is per device group, so reject > BARE mode where only the per-IOMMU iommu_qosid global default is > available. > > Validate every group member, firmware ID, device context, field value, > and QoS ID capability before changing hardware. Then update all members > through the checked IOMMU group helper so a validation failure leaves the > group unchanged. > > Serialize DC.ta changes with context setup under qosid_lock. Change only > the RCID and MCID fields with ordinary accesses so fixed DDT mappings are > not subject to atomic LR/SC operations, invalidate active device contexts > after an update, and clear the IDs when a device is released. > > Signed-off-by: Zhanpeng Zhang <[email protected]> > --- > arch/riscv/include/asm/qos.h | 16 +++ > drivers/iommu/riscv/iommu-bits.h | 15 +++ > drivers/iommu/riscv/iommu.c | 200 ++++++++++++++++++++++++++++++- > drivers/iommu/riscv/iommu.h | 3 + > 4 files changed, 232 insertions(+), 2 deletions(-) > [..] > +static void riscv_iommu_dc_update_qosid(struct riscv_iommu_device *iommu, > + struct riscv_iommu_dc *dc, > + u32 rcid, u32 mcid) > +{ > + u64 qos_ta = riscv_iommu_qosid_ta(rcid, mcid); > + u64 ta; > + > + lockdep_assert_held(&iommu->qosid_lock);
It seems that qosid_lock is not defined until the next patch. I think you should move the definition to this patch so that the series is bisectable. Thanks, Drew
