Document devicetree bindings for Andes ATCDMAC300 DMA engine ATCDMAC300 is the IP name, which is embedded in AndesCore-based platforms or SoCs such as AE350 and Qilai.
Signed-off-by: CL Wang <[email protected]> --- Changes for v3: - Rename DT binding file from andestech,qilai-dma.yaml to andestech,ae350-dma.yaml - Deprecate IP-core-based compatible usage and align with SoC/platform-based - Dropped Acked-by tag from Conor Dooley due to the above change. --- .../bindings/dma/andestech,ae350-dma.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/andestech,ae350-dma.yaml diff --git a/Documentation/devicetree/bindings/dma/andestech,ae350-dma.yaml b/Documentation/devicetree/bindings/dma/andestech,ae350-dma.yaml new file mode 100644 index 000000000000..0f5ffdf1d160 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/andestech,ae350-dma.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/andestech,ae350-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Andes ATCDMAC300 DMA Controller + +maintainers: + - CL Wang <[email protected]> + +allOf: + - $ref: dma-controller.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - andestech,qilai-dma + - const: andestech,ae350-dma + - const: andestech,ae350-dma + + reg: + minItems: 1 + maxItems: 2 + description: + First entry is the DMA controller register range (required). + Second entry is the cache control in IOCP controller (optional). + + reg-names: + minItems: 1 + items: + - const: dma + - const: iocp + + interrupts: + maxItems: 1 + + "#dma-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + dma-controller@f0c00000 { + compatible = "andestech,ae350-dma"; + reg = <0x0 0xf0c00000 0x0 0x1000>, + <0x0 0xe8000000 0x0 0x10>; + reg-names = "dma", "iocp"; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + }; + }; +... -- 2.34.1
