From: Duje Mihanović <[email protected]> Add the newly implemented reset cells to the SoC dtsi.
Signed-off-by: Duje Mihanović <[email protected]> --- arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi index 5778bfdb8567..05b56a759e27 100644 --- a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi +++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi @@ -132,6 +132,7 @@ twsi1: i2c@10800 { reg = <0x10800 0x64>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apbc PXA1908_CLK_TWSI1>; + resets = <&apbc PXA1908_CLK_TWSI1>; mrvl,i2c-fast-mode; status = "disabled"; }; @@ -143,6 +144,7 @@ twsi0: i2c@11000 { reg = <0x11000 0x64>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apbc PXA1908_CLK_TWSI0>; + resets = <&apbc PXA1908_CLK_TWSI0>; mrvl,i2c-fast-mode; status = "disabled"; }; @@ -154,6 +156,7 @@ twsi3: i2c@13800 { reg = <0x13800 0x64>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apbc PXA1908_CLK_TWSI3>; + resets = <&apbc PXA1908_CLK_TWSI3>; mrvl,i2c-fast-mode; status = "disabled"; }; @@ -162,6 +165,7 @@ apbc: clock-controller@15000 { compatible = "marvell,pxa1908-apbc"; reg = <0x15000 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; uart0: serial@17000 { @@ -169,6 +173,7 @@ uart0: serial@17000 { reg = <0x17000 0x1000>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apbc PXA1908_CLK_UART0>; + resets = <&apbc PXA1908_CLK_UART0>; reg-shift = <2>; }; @@ -177,6 +182,7 @@ uart1: serial@18000 { reg = <0x18000 0x1000>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apbc PXA1908_CLK_UART1>; + resets = <&apbc PXA1908_CLK_UART1>; reg-shift = <2>; }; @@ -188,6 +194,7 @@ gpio: gpio@19000 { gpio-controller; #gpio-cells = <2>; clocks = <&apbc PXA1908_CLK_GPIO>; + resets = <&apbc PXA1908_CLK_GPIO>; interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "gpio_mux"; interrupt-controller; @@ -215,6 +222,7 @@ pwm0: pwm@1a000 { compatible = "marvell,pxa250-pwm"; reg = <0x1a000 0x10>; clocks = <&apbc PXA1908_CLK_PWM0>; + resets = <&apbc PXA1908_CLK_PWM0>; #pwm-cells = <1>; status = "disabled"; }; @@ -223,6 +231,7 @@ pwm1: pwm@1a400 { compatible = "marvell,pxa250-pwm"; reg = <0x1a400 0x10>; clocks = <&apbc PXA1908_CLK_PWM1>; + resets = <&apbc PXA1908_CLK_PWM1>; #pwm-cells = <1>; status = "disabled"; }; @@ -231,6 +240,7 @@ pwm2: pwm@1a800 { compatible = "marvell,pxa250-pwm"; reg = <0x1a800 0x10>; clocks = <&apbc PXA1908_CLK_PWM2>; + resets = <&apbc PXA1908_CLK_PWM2>; #pwm-cells = <1>; status = "disabled"; }; @@ -239,6 +249,7 @@ pwm3: pwm@1ac00 { compatible = "marvell,pxa250-pwm"; reg = <0x1ac00 0x10>; clocks = <&apbc PXA1908_CLK_PWM3>; + resets = <&apbc PXA1908_CLK_PWM3>; #pwm-cells = <1>; status = "disabled"; }; @@ -261,6 +272,7 @@ uart2: serial@36000 { reg = <0x36000 0x1000>; interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apbcp PXA1908_CLK_UART2>; + resets = <&apbcp PXA1908_CLK_UART2>; reg-shift = <2>; }; @@ -271,6 +283,7 @@ twsi2: i2c@37000 { reg = <0x37000 0x64>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apbcp PXA1908_CLK_TWSI2>; + resets = <&apbcp PXA1908_CLK_TWSI2>; mrvl,i2c-fast-mode; status = "disabled"; }; @@ -279,6 +292,7 @@ apbcp: clock-controller@3b000 { compatible = "marvell,pxa1908-apbcp"; reg = <0x3b000 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; mpmu: clock-controller@50000 { -- 2.53.0
