- Extract start invocation code into a separate function called crb_trigger_tpm. This will be helpful in repeatedly calling the start method with different bits set to toggle between start, nextChunk or crbRspRetry behaviours. - Based on the bit set, we signal the TPM to consume contents of the command/response buffer. - No functional change intended.
Signed-off-by: Arun Menon <[email protected]> --- drivers/char/tpm/tpm_crb.c | 50 ++++++++++++++++++++------------------ 1 file changed, 27 insertions(+), 23 deletions(-) diff --git a/drivers/char/tpm/tpm_crb.c b/drivers/char/tpm/tpm_crb.c index 67c0061d4cab7..10128d078245c 100644 --- a/drivers/char/tpm/tpm_crb.c +++ b/drivers/char/tpm/tpm_crb.c @@ -445,6 +445,32 @@ static int tpm_crb_smc_start(struct device *dev, unsigned long func_id) } #endif +static int crb_trigger_tpm(struct tpm_chip *chip, u32 start_cmd) +{ + struct crb_priv *priv = dev_get_drvdata(&chip->dev); + int rc; + /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs + * report only ACPI start but in practice seems to require both + * CRB start, hence invoking CRB start method if hid == MSFT0101. + */ + if (priv->sm == ACPI_TPM2_COMMAND_BUFFER || + priv->sm == ACPI_TPM2_MEMORY_MAPPED || + !strcmp(priv->hid, "MSFT0101")) + iowrite32(start_cmd, &priv->regs_t->ctrl_start); + if (priv->sm == ACPI_TPM2_START_METHOD || + priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) + rc = crb_do_acpi_start(chip); + if (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) { + iowrite32(start_cmd, &priv->regs_t->ctrl_start); + rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id); + } + if (priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA) { + iowrite32(start_cmd, &priv->regs_t->ctrl_start); + rc = tpm_crb_ffa_start(CRB_FFA_START_TYPE_COMMAND, chip->locality); + } + return rc; +} + static int crb_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz, size_t len) { struct crb_priv *priv = dev_get_drvdata(&chip->dev); @@ -470,29 +496,7 @@ static int crb_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz, size_t len) /* Make sure that cmd is populated before issuing start. */ wmb(); - /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs - * report only ACPI start but in practice seems to require both - * CRB start, hence invoking CRB start method if hid == MSFT0101. - */ - if (priv->sm == ACPI_TPM2_COMMAND_BUFFER || - priv->sm == ACPI_TPM2_MEMORY_MAPPED || - !strcmp(priv->hid, "MSFT0101")) - iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start); - - if (priv->sm == ACPI_TPM2_START_METHOD || - priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) - rc = crb_do_acpi_start(chip); - - if (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) { - iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start); - rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id); - } - - if (priv->sm == ACPI_TPM2_CRB_WITH_ARM_FFA) { - iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start); - rc = tpm_crb_ffa_start(CRB_FFA_START_TYPE_COMMAND, chip->locality); - } - + rc = crb_trigger_tpm(chip, CRB_START_INVOKE); if (rc) return rc; -- 2.53.0
