On Tue, 11 Nov 2025 06:52:02 -0800
Alex Mastro <[email protected]> wrote:
> diff --git a/tools/testing/selftests/vfio/lib/vfio_pci_device.c 
> b/tools/testing/selftests/vfio/lib/vfio_pci_device.c
> index a381fd253aa7..7a523e3f2dce 100644
> --- a/tools/testing/selftests/vfio/lib/vfio_pci_device.c
> +++ b/tools/testing/selftests/vfio/lib/vfio_pci_device.c
> @@ -29,6 +29,173 @@
>       VFIO_ASSERT_EQ(__ret, 0, "ioctl(%s, %s, %s) returned %d\n", #_fd, #_op, 
> #_arg, __ret); \
>  } while (0)
>  
> +static struct vfio_info_cap_header *next_cap_hdr(void *buf, size_t bufsz,
> +                                              size_t *cap_offset)
> +{
> +     struct vfio_info_cap_header *hdr;
> +
> +     if (!*cap_offset)
> +             return NULL;
> +
> +     VFIO_ASSERT_LT(*cap_offset, bufsz);
> +     VFIO_ASSERT_GE(bufsz - *cap_offset, sizeof(*hdr));
> +
> +     hdr = (struct vfio_info_cap_header *)((u8 *)buf + *cap_offset);
> +
> +     if (hdr->next)
> +             VFIO_ASSERT_GT(hdr->next, *cap_offset);

This might be implementation, but I don't think it's a requirement.
The vfio capability chains are based on PCI capabilities, which have no
ordering requirement.  Thanks,

Alex

> +
> +     *cap_offset = hdr->next;
> +
> +     return hdr;
> +}

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