On Sun, Nov 9, 2025, at 04:23, Maciej W. Rozycki wrote: > On Sat, 8 Nov 2025, Arnd Bergmann wrote: > >> On other architectures, I see that parisc (always aliasing) has stubbed >> out the vdso functions, while mips/loongson has limited the page size >> selection to never alias. A few other mips platforms can theoretically >> enable both small pages and vdso, but my guess is that in practice >> they don't use the vdso (mips32/ath79) or they use 16KB pages >> (rm, dec, ip22) based on the defconfig settings. > > Umm, I'd have to dive into the details (and I hardly have the resources > at hand), but quite a bunch of MIPS microarchitectures suffer from cache > aliases; some even have VIVT caches.
I was going with this list: $ git grep define.cpu_has_dc_aliases arch/mips/ arch/mips/include/asm/cpu-features.h:#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES) arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h:#define cpu_has_dc_aliases 1 arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 arch/mips/include/asm/mach-dec/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 arch/mips/include/asm/mach-dec/cpu-feature-overrides.h:#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) arch/mips/include/asm/mach-ingenic/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h:#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 /* see probe_pcache() */ arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h:#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h:#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) arch/mips/include/asm/mach-malta/cpu-feature-overrides.h:/* #define cpu_has_dc_aliases ? */ arch/mips/include/asm/mach-malta/cpu-feature-overrides.h:/* #define cpu_has_dc_aliases ? */ arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 arch/mips/include/asm/mach-rm/cpu-feature-overrides.h:#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h:#define cpu_has_dc_aliases 0 which for many platforms seems to come up with a compile-time constant value. I hadn't checked the exact conditions for the runtime MIPS_CACHE_ALIASES flag, but I see that the kernel has a fairly centralized detection function in probe_pcache() https://elixir.bootlin.com/linux/v6.17.7/source/arch/mips/mm/c-r4k.c#L1251 which is used for the 'generic' platform and those that don't set a compile-time constant (ath25, bcm47xx, bmips, cobalt, ip32, malta, pic32, rc32434 and tx49xx). > (see the figures at the bottom; uptime quoted for an idea of the rate, > though the system hasn't been heavily loaded). It is possible with the > aid of S$, which is inclusive and PIPT. I now found commit 0f02cfbc3d9e ("MIPS: VDSO: Match data page cache colouring when D$ aliases"), which probably does everything necessary to just make it work reliably on mips, and should be portable to sparc as Andy suggested as well. Arnd
