tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 3fb6d0e00efc958d01c2f109c8453033a2d96796 commit: 688f97ed3f5e339c0c2c09d9ee7ff23d5807b0a7 drm/amd/display: Add vupdate_no_lock interrupts for DCN2.1 date: 4 days ago config: i386-randconfig-r002-20210227 (attached as .config) compiler: gcc-9 (Debian 9.3.0-15) 9.3.0 reproduce (this is a W=1 build): # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=688f97ed3f5e339c0c2c09d9ee7ff23d5807b0a7 git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout 688f97ed3f5e339c0c2c09d9ee7ff23d5807b0a7 # save the attached .config to linux build tree make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> All warnings (new ones prefixed by >>): drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:43:20: warning: no previous prototype for 'to_dal_irq_source_dcn21' [-Wmissing-prototypes] 43 | enum dc_irq_source to_dal_irq_source_dcn21( | ^~~~~~~~~~~~~~~~~~~~~~~ >> drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: >> warning: initialized field overwritten [-Woverride-init] 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: (near initialization for 'irq_source_info_dcn21[72]') 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | >> drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: >> warning: initialized field overwritten [-Woverride-init] 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: (near initialization for 'irq_source_info_dcn21[73]') 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | >> drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: >> warning: initialized field overwritten [-Woverride-init] 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: (near initialization for 'irq_source_info_dcn21[74]') 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | >> drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: >> warning: initialized field overwritten [-Woverride-init] 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: (near initialization for 'irq_source_info_dcn21[75]') 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | >> drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: >> warning: initialized field overwritten [-Woverride-init] 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: (near initialization for 'irq_source_info_dcn21[76]') 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | >> drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: >> warning: initialized field overwritten [-Woverride-init] 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: (near initialization for 'irq_source_info_dcn21[77]') 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c:242:39: note: in definition of macro 'vupdate_no_lock_int_entry' 242 | [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ | ^~ 243 | IRQ_REG_ENTRY(OTG, reg_num,\ | vim +242 drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.c 178 179 /* compile time expand base address. */ 180 #define BASE(seg) \ 181 BASE_INNER(seg) 182 183 184 #define SRI(reg_name, block, id)\ 185 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 186 mm ## block ## id ## _ ## reg_name 187 188 189 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 190 .enable_reg = SRI(reg1, block, reg_num),\ 191 .enable_mask = \ 192 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 193 .enable_value = {\ 194 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 195 ~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \ 196 },\ 197 .ack_reg = SRI(reg2, block, reg_num),\ 198 .ack_mask = \ 199 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 200 .ack_value = \ 201 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 202 203 204 205 #define hpd_int_entry(reg_num)\ 206 [DC_IRQ_SOURCE_HPD1 + reg_num] = {\ 207 IRQ_REG_ENTRY(HPD, reg_num,\ 208 DC_HPD_INT_CONTROL, DC_HPD_INT_EN,\ 209 DC_HPD_INT_CONTROL, DC_HPD_INT_ACK),\ 210 .status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num),\ 211 .funcs = &hpd_irq_info_funcs\ 212 } 213 214 #define hpd_rx_int_entry(reg_num)\ 215 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\ 216 IRQ_REG_ENTRY(HPD, reg_num,\ 217 DC_HPD_INT_CONTROL, DC_HPD_RX_INT_EN,\ 218 DC_HPD_INT_CONTROL, DC_HPD_RX_INT_ACK),\ 219 .status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num),\ 220 .funcs = &hpd_rx_irq_info_funcs\ 221 } 222 #define pflip_int_entry(reg_num)\ 223 [DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\ 224 IRQ_REG_ENTRY(HUBPREQ, reg_num,\ 225 DCSURF_SURFACE_FLIP_INTERRUPT, SURFACE_FLIP_INT_MASK,\ 226 DCSURF_SURFACE_FLIP_INTERRUPT, SURFACE_FLIP_CLEAR),\ 227 .funcs = &pflip_irq_info_funcs\ 228 } 229 230 #define vupdate_int_entry(reg_num)\ 231 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ 232 IRQ_REG_ENTRY(OTG, reg_num,\ 233 OTG_GLOBAL_SYNC_STATUS, VUPDATE_INT_EN,\ 234 OTG_GLOBAL_SYNC_STATUS, VUPDATE_EVENT_CLEAR),\ 235 .funcs = &vblank_irq_info_funcs\ 236 } 237 238 /* vupdate_no_lock_int_entry maps to DC_IRQ_SOURCE_VUPDATEx, to match semantic 239 * of DCE's DC_IRQ_SOURCE_VUPDATEx. 240 */ 241 #define vupdate_no_lock_int_entry(reg_num)\ > 242 [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ 243 IRQ_REG_ENTRY(OTG, reg_num,\ 244 OTG_GLOBAL_SYNC_STATUS, VUPDATE_NO_LOCK_INT_EN,\ 245 OTG_GLOBAL_SYNC_STATUS, VUPDATE_NO_LOCK_EVENT_CLEAR),\ 246 .funcs = &vupdate_no_lock_irq_info_funcs\ 247 } 248 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
