From: Kan Liang <[email protected]> Add Arch LBR related MSRs in MSR-index.
Signed-off-by: Kan Liang <[email protected]> --- arch/x86/include/asm/msr-index.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 12c9684..7b7d82f 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -156,6 +156,26 @@ #define LBR_INFO_ABORT BIT_ULL(61) #define LBR_INFO_CYCLES 0xffff +#define MSR_ARCH_LBR_CTL 0x000014ce +#define ARCH_LBR_CTL_LBREN BIT(0) +#define ARCH_LBR_CTL_CPL_OFFSET 1 +#define ARCH_LBR_CTL_CPL (0x3ull << ARCH_LBR_CTL_CPL_OFFSET) +#define ARCH_LBR_CTL_STACK_OFFSET 3 +#define ARCH_LBR_CTL_STACK (0x1ull << ARCH_LBR_CTL_STACK_OFFSET) +#define ARCH_LBR_CTL_FILTER_OFFSET 16 +#define ARCH_LBR_CTL_FILTER (0x7full << ARCH_LBR_CTL_FILTER_OFFSET) +#define MSR_ARCH_LBR_DEPTH 0x000014cf +#define MSR_ARCH_LBR_FROM_0 0x00001500 +#define MSR_ARCH_LBR_TO_0 0x00001600 +#define MSR_ARCH_LBR_INFO_0 0x00001200 +#define ARCH_LBR_INFO_MISPRED BIT_ULL(63) +#define ARCH_LBR_INFO_IN_TSX BIT_ULL(62) +#define ARCH_LBR_INFO_TSX_ABORT BIT_ULL(61) +#define ARCH_LBR_INFO_CYC_CNT_VALID BIT_ULL(60) +#define ARCH_LBR_INFO_BR_TYPE_OFFSET 56 +#define ARCH_LBR_INFO_BR_TYPE (0xfull << ARCH_LBR_INFO_BR_TYPE_OFFSET) +#define ARCH_LBR_INFO_CYC_CNT 0xffff + #define MSR_IA32_PEBS_ENABLE 0x000003f1 #define MSR_PEBS_DATA_CFG 0x000003f2 #define MSR_IA32_DS_AREA 0x00000600 -- 2.7.4
